AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 630

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.7.1.8
26.7.1.9
32072G–11/2011
ID detection
Plug-In detection
Moreover, the pad goes to the Idle state if the macro is disabled or if the DETACH bit is written to
one. It returns to the Active state when USBE is written to one and DETACH is written to zero.
The USB connection is detected from the USB_VBUS pad.
architecture of the plug-in detector.
Figure 26-10. Plug-In Detection Input Block Diagram
The control logic of the USB_VBUS pad outputs two signals:
In device mode, the USBSTA.VBUS bit follows the Session_valid comparator output:
In host mode, the USBSTA.VBUS bit follows an hysteresis based on Session_valid and
Va_Vbus_valid:
The VBus Transition interrupt (VBUSTI) bit in USBSTA is set on each transition of the USB-
STA.VBUS bit.
The USBSTA.VBUS bit is effective whether the USBB is enabled or not.
Figure 26-11 on page 631
• The Session_valid signal is high when the voltage on the USB_VBUS pad is higher than or
• The Va_Vbus_valid signal is high when the voltage on the USB_VBUS pad is higher than or
• It is set when the voltage on the USB_VBUS pad is higher than or equal to 1.4V.
• It is cleared when the voltage on the VBUS pad is lower than 1.4V.
• It is set when the voltage on the USB_VBUS pad is higher than or equal to 4.4V.
• It is cleared when the voltage on the USB_VBUS pad is lower than 1.4V.
equal to 1.4V.
equal to 4.4V.
USB_VBUS
Pad Logic
shows how the ID transitions are detected.
GND
VDD
Session_valid
Va_Vbus_valid
VBus_pulsing
VBus_discharge
Logic
USBSTA
Figure 26-10 on page 630
VBUS
VBUSTI
USBSTA
shows the
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