SAM3N4B Atmel Corporation, SAM3N4B Datasheet - Page 66
SAM3N4B
Manufacturer Part Number
SAM3N4B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N4B
Flash (kbytes)
256 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
79
Ext Interrupts
79
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
24
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.6.3
10.6.3.1
10.6.3.2
10.6.3.3
10.6.4
66
SAM3N
Exception handlers
Vector table
Interrupt Service Routines (ISRs)
Fault handlers
System handlers
For more information about hard faults, memory management faults, bus faults, and usage
faults, see
The processor handles exceptions using:
Interrupts IRQ0 to IRQ32 are the exceptions handled by ISRs.
Hard fault, memory management fault, usage fault, bus fault are fault exceptions handled by the
fault handlers.
NMI, PendSV, SVCall SysTick, and the fault exceptions are all system exceptions that are han-
dled by system handlers.
The vector table contains the reset value of the stack pointer, and the start addresses, also
called exception vectors, for all exception handlers.
the exception vectors in the vector table. The least-significant bit of each vector must be 1, indi-
cating that the exception handler is Thumb code.
•
“Interrupt Clear-enable Registers” on page
“Fault handling” on page
70.
154.
Figure 10-3 on page 67
11011A–ATARM–04-Oct-10
shows the order of
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