SAM3N4B Atmel Corporation, SAM3N4B Datasheet - Page 71

• Manufacturer Part Number: SAM3N4B
• Manufacturer: Atmel Corporation

Specifications of SAM3N4B

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 24
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

10.7.1
10.7.2
11011A–ATARM–04-Oct-10
Fault types
Fault escalation and hard faults
Table 10-11
tus register, and the register bit that indicates that the fault has occurred. See
Fault Status Register” on page 181
Table 10-11. Faults
1.
All faults exceptions except for hard fault have configurable exception priority, see
dler Priority Registers” on page
faults, see
Usually, the exception priority, together with the values of the exception mask registers, deter-
mines whether the processor enters the fault handler, and whether a fault handler can preempt
another fault handler. as described in
In some situations, a fault with configurable priority is treated as a hard fault. This is called prior-
ity escalation, and the fault is described as escalated to hard fault. Escalation to hard fault
occurs when:
Fault
Bus error on a vector read
Fault escalated to a hard fault
Bus error:
Precise data bus error
Imprecise data bus error
Attempt to access a coprocessor
Undefined instruction
Attempt to enter an invalid instruction
set state
Invalid EXC_RETURN value
Illegal unaligned load or store
Divide By 0
• an internally-detected error such as an undefined instruction or an attempt to change state
• attempting to execute an instruction from a memory region marked as Non-Executable
• A fault handler causes the same kind of fault as the one it is servicing. This escalation to hard
with a BX instruction
fault occurs because a fault handler cannot preempt itself because it must have the same
priority as the current priority level.
during exception stacking
during exception unstacking
during instruction prefetch
Attempting to use an instruction set other than the Thumb instruction set.
(1)
“System Handler Control and State Register” on page
shows the types of fault, the handler used for the fault, the corresponding fault sta-
176. Software can disable execution of the handlers for these
for more information about the fault status registers.
“Exception model” on page
Handler
Hard fault
Bus fault
Usage
fault
Bit name
VECTTBL
FORCED
-
STKERR
UNSTKERR
IBUSERR
PRECISERR
IMPRECISER
R
NOCP
UNDEFINSTR
INVSTATE
INVPC
UNALIGNED
DIVBYZERO
179.
63.
Fault status register
“Hard Fault Status
Register” on page 187
-
“Bus Fault Status Register”
on page 183
“Usage Fault Status
Register” on page 185
SAM3N
“Configurable
“System Han-
(XN).
71