AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 1106

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

36.6.4.3
36.6.4.4
9166C–AVR-08/11
Dual-sequencer mode (simultaneous sampling)
Sequencer behavior on a Start Of Conversion
Figure 36-2. Single Sequencer Chronogram (assuming SRES=8, SHD=0)
The ADC has the ability to sample two pairs of ADCINx inputs simultaneously (see
provided that one pair is from the inputs available on the sequencer 0 and the other is from the
inputs available on the sequencer 1 (see
pling mode, the SSMQ bit needs to be set in the CFG register.
Figure 36-3. Dual Sequencer Chronogram (assuming SRES=8, SHD=0)
In this chronogram, ADCCONV signal represents the value being sampled by the ADC
Thanks to the SOCB bit in the SEQCFGx register, 2 different sequencer behaviors are possible:
Table 36-5.
SOCB
0
1
Comment
All sequence conversions are performed on a SOC event.
A single conversion belonging to the sequence is performed on a SOC event.
SOCB Behavior
Figure
36-1). To put the ADC into simultaneous sam-
AT32UC3C
Figure
36-3),
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