AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 1151

• Manufacturer Part Number: AT32UC3C2512C Automotive
• Manufacturer: Atmel Corporation

37.6.2.2
37.6.2.3
9166C–AVR-08/11
Low Power mode
Calibration
CLK_DACIFB
TCR.PRESC[2:0]
Figure 37-2. DAC Timing Counters
In order to reduce the power consumption during DAC conversions, the DAC Low Power mode
may be enabled. In low power mode, the DAC is turned off between each conversion.
Conversion time will be longer if new conversions are started in this mode: a fourfold increase of
the DAC’s output settling time should be expected.
To achieve optimal accuracy, it is possible to calibrate both gain (GOC.GCR) and offset error
(GOC.OCR) in the DAC. The MSB of the GCR and OCR fields is the sign bit.
Gain and Offset are not calibrated automatically and this must be done by software. To perform
this operation, the DAC internal output must be beforehand routed to the ADC using the CR.IE
bit.
The test values converted by the DAC are sampled by the ADC which returns a measured value
of the DAC output. Calculating the difference between a series of DACIFB channel input values
and their respective effective levels after conversion makes it possible to deduce both DAC gain
and offset biases.
To get the best calibration result, it is recommended to use the same AREF voltage, output
channel selection, sampling time, and refresh interval when calibrating as in normal DAC
operation.
Including errors, the DAC output value can be expressed as:
Prescaler
Timing Counter
TRA.TCD[7:0]
PrescalerClock
Timing Counter
TRB.TCD[7:0]
Refresh Counter
TCR.CHRA[3:0]
Refresh Counter
TCR.CHRB[3:0]
Channel Interval
TCR.CHI[6:0]
AT32UC3C
Counter
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