AT32UC3C2512C Automotive Atmel Corporation, AT32UC3C2512C Automotive Datasheet - Page 500

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AT32UC3C2512C Automotive

Manufacturer Part Number
AT32UC3C2512C Automotive
Description
Manufacturer
Atmel Corporation
Table 24-5.
24.5.17.1
9166C–AVR-08/11
Pin Name
TX_CLK
CRS
COL
RX_DV
RXD[3:0]
RX_ER
RX_CLK
TX_EN
TXD[3:0]
TX_ER
RMII Transmit and Receive Operation
Pin Configuration
Transmit Clock
Carrier Sense
Collision Detect
Data Valid
RXS[3:0] 4-bit Receive Data
Receive Error
Receive Clock
Transmit Enable
TXD[3:0] 4-bit Transmit Data
Transmit Error
The MII and RMII interface are capable of both 10Mb/s and 100Mb/s data rates as described in
the IEEE 802.3u standard. The signals used by the MII and RMII interfaces are described in
Table
The intent of the RMII is to provide a reduced pin count alternative to the IEEE 802.3u MII. It
uses 2 bits for transmission (TXD[1:0]) and two bits for reception (RXD[1:0]). There are Transmit
Enable (TX_EN), a Receive Error (RX_ER), a Carrier Sense (CRS), and a 50 MHz Reference
Clock (TX_CLK) for 100Mb/s data rate.
The same signals are used internally for both the RMII and the MII operations. The RMII maps
these signals in a more pin-efficient manner. The transmit and receive bits are converted from a
4-bit parallel format to a 2-bit parallel scheme that is clocked at twice the rate. The carrier sense
and data valid signals are combined into the RX_DV signal. This signal contains information on
carrier sense, FIFO status, and validity of the data. Transmit error bit (TX_ER) and collision
detect (COL) are not used in RMII mode.
24-5.
MII
Reference Clock
Carrier Sense/Data Valid
RXD[1:0] 2-bit Receive Data
Receive Error
Transmit Enable
TXD[1:0] 2-bit Transmit Data
RMII
AT32UC3C
500

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