ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 107

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

15.9.2
15.9.3
15.9.4
8285D–AVR–06/11
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
TIMSK0 – Timer/Counter 0 Interrupt Mask Register
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 15-6.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a compare match between TCNT0 and the OCR0A Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
• Bit 1 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set (one), the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
Bit
0x26 (0x46)
Read/Write
Initial Value
Bit
0x27 (0x47)
Read/Write
Initial Value
Bit
(0x6E)
Read/Write
Initial Value
CS02
0
0
0
0
1
1
1
1
CS01
0
0
1
1
0
0
1
1
Clock Select Bit Description
R/W
R/W
R
7
0
7
0
7
–
0
CS00
0
1
0
1
0
1
0
1
R/W
R/W
R
6
0
6
0
6
–
0
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
R/W
R
5
0
5
0
5
–
0
R/W
R/W
R
4
0
4
0
4
–
0
OCR0A[7:0]
TCNT0[7:0]
R/W
R/W
R
3
0
3
0
3
–
0
R/W
R/W
R
2
0
2
0
2
–
0
OCIE0A
R/W
R/W
R/W
1
0
1
0
1
0
TOIE0
R/W
R/W
R/W
0
0
0
0
0
0
OCR0A
TIMSK0
TCNT0
107