ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 159

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

19. SPI – Serial Peripheral Interface
19.1
19.2
8285D–AVR–06/11
Features
Overview
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
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The Serial Peripheral Interface (SPI) allows high-speed synchronous data transfer between the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P and peripheral
devices or between several AVR devices.
The PRSPI bit in
enable SPI module.
Figure 19-1. SPI Block Diagram
Note:
The interconnection between Master and Slave CPUs with SPI is shown in
tem consists of two shift Registers, and a Master clock generator. The SPI Master initiates the
Full-duplex, Three-wire Synchronous Data Transfer
Master or Slave Operation
LSB First or MSB First Data Transfer
Seven Programmable Bit Rates
End of Transmission Interrupt Flag
Write Collision Flag Protection
Wake-up from Idle Mode
Double Speed (CK/2) Master SPI Mode
1. Refer to
/2/4/8/16/32/64/128
DIVIDER
”PRR – Power Reduction Register” on page 45
Figure 1-1 on page
(1)
2, and
Table 14-3 on page 76
for SPI pin placement.
must be written to zero to
Figure
19-2. The sys-
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