ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 142
ATmega325PA
Manufacturer Part Number
ATmega325PA
Description
Manufacturer
Atmel Corporation
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18.5
8285D–AVR–06/11
Output Compare Unit
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Signal description (internal signals):
Depending on the mode of operation used, the counter is cleared, incremented, or decremented
at each timer clock (clk
selected by the Clock Select bits (CS2[2:0]). When no clock source is selected (CS2[2:0] = 0)
the timer is stopped. However, the TCNT2 value can be accessed by the CPU, regardless of
whether clk
count operations.
The counting sequence is determined by the setting of the WGM21 and WGM20 bits located in
the Timer/Counter Control Register (TCCR2A). There are close connections between how the
counter behaves (counts) and how waveforms are generated on the Output Compare output
OC2A. For more details about advanced counting sequences and waveform generation, see
”Modes of Operation” on page
The Timer/Counter Overflow Flag (TOV2) is set according to the mode of operation selected by
the WGM2[1:0] bits. TOV2 can be used for generating a CPU interrupt.
The 8-bit comparator continuously compares TCNT2 with the Output Compare Register
(OCR2A). Whenever TCNT2 equals OCR2A, the comparator signals a match. A match will set
the Output Compare Flag (OCF2A) at the next timer clock cycle. If enabled (OCIE2A = 1), the
Output Compare Flag generates an Output Compare interrupt. The OCF2A Flag is automatically
cleared when the interrupt is executed. Alternatively, the OCF2A Flag can be cleared by soft-
ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match
signal to generate an output according to operating mode set by the WGM2[1:0] bits and Com-
pare Output mode (COM2A[1:0]) bits. The max and bottom signals are used by the Waveform
Generator for handling the special cases of the extreme values in some modes of operation
(”Modes of Operation” on page
Figure 18-3
count
direction
clear
clk
top
bottom
T2
T2
shows a block diagram of the Output Compare unit.
is present or not. A CPU write overrides (has priority over) all counter clear or
T2
). clk
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT2 has reached maximum value.
Signalizes that TCNT2 has reached minimum value (zero).
145.
T2
145).
can be generated from an external or internal clock source,
142
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