ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 298

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

27.8
27.8.1
8285D–AVR–06/11
Serial Downloading
Serial Programming Pin Mapping
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 27-13. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and MISO (out-
put). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface.
Table 27-14. Pin Mapping Serial Programming
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
XLPH
PLXH
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
BVDV
OLDV
OHDZ
1. t
2. t
Symbol
MOSI
MISO
SCK
commands.
WLRH
WLRH_CE
Parameter
XTAL1 Low to PAGEL high
PAGEL low to XTAL1 high
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
is valid for the Chip Erase command.
Pins
PB2
PB3
PB1
(1)
(2)
CC
= 5V ± 10% (Continued)
I/O
O
I
I
Table 27-14 on page
Min
150
150
150
3.7
7.5
67
67
67
67
67
0
0
0
0
Typ
Serial Data out
Serial Data in
Description
Serial Clock
Max
250
250
250
4.5
1
9
298, the pin
Units
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
298