ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 120

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

16.8.1
8285D–AVR–06/11
Compare Output Mode and Waveform Generation
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Figure 16-5. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC1x) from the Waveform
Generator if either of the COM1x1:0 bits are set. However, the OC1x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC1x pin (DDR_OC1x) must be set as output before the OC1x value is visi-
ble on the pin. The port override function is generally independent of the Waveform Generation
mode, but there are some exceptions. Refer to
details.
The design of the Output Compare pin logic allows initialization of the OC1x state before the out-
put is enabled. Note that some COM1x1:0 bit settings are reserved for certain modes of
operation.
The COM1x1:0 bits have no effect on the Input Capture unit.
The Waveform Generator uses the COM1x1:0 bits differently in normal, CTC, and PWM modes.
For all modes, setting the COM1x1:0 = 0 tells the Waveform Generator that no action on the
OC1x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
page
A change of the COM1x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC1x strobe bits.
COMnx1
COMnx0
FOCnx
130, and for phase correct and phase and frequency correct PWM refer to
131.
clk
I/O
See ”Register Description” on page 130.
Waveform
Generator
Table 16-2 on page
D
D
D
PORT
DDR
OCnx
130. For fast PWM mode refer to
Q
Q
Q
Table
16-2,
1
0
Table 16-3
and
Table 16-4
Table 16-3 on
Table 16-4 on
OCnx
Pin
120
for