ATmega325PA Atmel Corporation, ATmega325PA Datasheet - Page 328

• Manufacturer Part Number: ATmega325PA
• Manufacturer: Atmel Corporation

28.9
8285D–AVR–06/11
SPI Timing Characteristics
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
See
Table 28-18. SPI Timing Parameters
Note:
Figure 28-4. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 28-4 on page 328
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
1. In SPI Programming mode the minimum SCK high/low period is:
Description
- 2 t
- 3 t
MISO
MOSI
SS high to tri-state
SCK
SCK
SCK to out high
SCK high/low
SCK to SS high
SS
SS low to SCK
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
CLCL
CLCL
SCK period
SCK period
Out to SCK
SCK to out
SCK to out
Setup
Setup
Hold
Hold
for f
for f
CK
CK
< 12MHz
> 12MHz
6
4
(1)
MSB
5
MSB
and
Figure 28-5 on page 329
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
20 • t
4 • t
2 • t
...
Min
10
t
20
ck
ck
ck
ck
for details.
See
50% duty cycle
2
0.5 • t
Table 19-5
Typ
3.6
1.6
10
10
10
10
15
15
10
LSB
1
sck
LSB
2
3
8
Max
ns
µs
ns
328