AD9286 Analog Devices, AD9286 Datasheet - Page 24

• Manufacturer Part Number: AD9286
• Description: 8-Bit, 500 MSPS, 1.8 V Analog-to-Digital Converter (ADC)
• Manufacturer: Analog Devices

Specifications of AD9286

• Resolution (bits): 8bit
• # Chan: 2
• Sample Rate: 500MSPS
• Interface: Par
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: 2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9286
Addr
(Hex)
0x0F
0x10
0x14
0x16
0x18
0x24
0x25
0x37
0x38
Register
Name
ADC input
(global/local)
Offset (local)
Output
mode (local)
Output
phase
(global)
Voltage
reference
(global)
MISR LSB
(local)
MISR MSB
(local)
Timing
adjust (local)
Bit 7
(MSB)
DCO invert
Bit 6
Open
Open
Open
Open
Open
Bit 5
Open
MSBs of multiple input shift register (MISR)
LSBs of multiple input shift register (MISR)
Bit 4
Output
enable
Rev. A | Page 24 of 28
Voltage reference and input full-scale adjustment (see Table 14)
Bit 3
Open
Open
Offset adjust (twos complement format)
Bit 2
Analog
disconnect
(local)
Output
invert
Coarse timing skew
Fine timing skew
1111: 1.125 ps
0000: 0.0 ps
0000: 0.0 ps
0001: 0.075 ps
0001: 1.2 ps
1111: 18 ps
0111: +7
0110: +6
0001: +1
1111: −1
1001: −7
1000: −8
0000: 0
…
…
…
…
Bit 1
Common-
mode
input
enable
(global)
Data format select
00: offset binary
01: twos complement
10: Gray code
11: reserved
Bit 0
(LSB)
Open
Default
Value
(Hex)
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Default
Notes/
Comments
Device
offset trim
Configures
the outputs
and the
format of
the data
Selects/
adjusts V
MISR least
significant
byte; read
only
MISR most
significant
byte; read
only
Determines
the clock
delay that is
introduced
into the
sampling
path
Determines
the clock
delay that is
introduced
into the
sampling
path
REF