AD7762 Analog Devices, AD7762 Datasheet - Page 16
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AD7762
Manufacturer Part Number
AD7762
Description
Parallel Interface, 625 kSPS, 24-Bit Sigma-Delta A/D Converter
Manufacturer
Analog Devices
Datasheet
1.AD7762.pdf
(28 pages)
Specifications of AD7762
Resolution (bits)
24bit
# Chan
1
Sample Rate
40MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
(1.6Vref) p-p,4 V p-p,6.5 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
QFP
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AD7762
DRIVING THE AD7762
The AD7762 has an on-chip differential amplifier that operates
with a supply voltage (AV
V reference, the supply voltage must be 5 V.
To achieve the specified performance in normal mode, the
differential amplifier should be configured as a first-order
antialias filter, as shown in Figure 25. Any additional filtering
should be carried out in previous stages using low noise, high
performance op amps, such as the AD8021.
Suitable component values for the first-order filter are listed in
Table 8. The values in Table 8 yield a 10 dB attenuation at the
first alias point of 19 MHz.
Table 8. Normal Mode Component Values
V
4.096 V
Figure 26 shows the signal conditioning that occurs using the
circuit in Figure 25 with a ±2.5 V input signal biased around
ground and having the component values and conditions in
Table 8. The differential amplifier always biases the output
signal to sit on the optimum common mode of V
case 2.048 V. The signal is also scaled to give the maximum
allowable voltage swing with this reference value. This is
calculated as 80% of V
on each input.
To obtain maximum performance from the AD7762, it is
advisable to drive the ADC with differential signals.
shows how a bipolar, single-ended signal biased around ground
can drive the AD7762 with the use of an external op amp, such
as the AD8021.
With a 4.096 V reference, a 5 V supply must be provided to the
reference buffer (AV
must be provided to AV
REF
R
1 kΩ
IN
Figure 25. Differential Amplifier Configuration
A
B
DD4
R
655 Ω
REF
). With a 2.5 V reference, a 3.3 V supply
FB
R
R
DD4
, that is, 0.8 × 4.096 V ≈ 3.275 V p-p
IN
C
IN
DD3
S
.
) from 3.15 V to 5.25 V. For a 4.096
R
C
C
R
A1
R
18 Ω
FB
FB
FB
FB
M
R
R
M
M
C
5.6 pF
S
V
V
REF
IN
IN
–
+
/2, in this
Figure 27
C
33 pF
FB
Rev. 0 | Page 16 of 28
+2.5V
–2.5V
+2.5V
–2.5V
The AD7762 employs a double sampling front end, as shown in
Figure 28. For simplicity, only the equivalent input circuit for V
is shown. The equivalent input circuitry for V
V
IN
0V
0V
V
IN
+
CPA
A
B
Figure 26. Differential Amplifier Signal Conditioning
Figure 27. Single-Ended-to-Differential Conversion
2R
Figure 28. Equivalent Input Circuit
R
SS1
SH1
SS2
SH2
CPB1
CPB2
AD8021
2R
CS1
CS2
SS3
SS4
+3.685V
+2.048V
+0.410V
+3.685V
+2.048V
+0.410V
R
R
IN
IN
C
SH3
SH4
S
IN
R
C
C
R
A1
− is the same.
FB
FB
MODULATOR
FB
FB
ANALOG
R
R
V
V
M
M
IN
IN
+
–
IN
V
V
+
IN
IN
–
+