AD7942 Analog Devices, AD7942 Datasheet - Page 14

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AD7942

Manufacturer Part Number
AD7942
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7942

Resolution (bits)
14bit
# Chan
1
Sample Rate
250kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(Vref) p-p,Uni (Vref)
Adc Architecture
SAR
Pkg Type
CSP,SOP

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AD7942
Transfer Functions
The ideal transfer characteristic for the AD7942 is shown in
Figure 23 and Table 7.
Table 7. Output Codes and Ideal Input Voltages
Description
FSR – 1 LSB
Midscale + 1 LSB
Midscale
Midscale – 1 LSB
–FSR + 1 LSB
–FSR
1
2
This is also the code for an overranged analog input (V
This is also the code for an underranged analog input (V
111...111
111...110
111...101
000...010
000...001
000...000
–FS + 0.5 LSB
–FS
Figure 23. ADC Ideal Transfer Function
–FS + 1 LSB
Analog Input
V
4.999695 V
2.500305 V
2.5 V
2.499695 V
305.2 μV
0 V
0V TO V
REF
NOTE 1: SEE THE VOLTAGE REFERENCE INPUT SECTION FOR REFERENCE SELECTION.
NOTE 2: C
NOTE 3: SEE DRIVER AMPLIFIER CHOICE SECTION.
NOTE 4: OPTIONAL FILTER. SEE ANALOG INPUT SECTION.
NOTE 5: SEE DIGITAL INTERFACE FOR MOST CONVENIENT INTERFACE MODE.
= 5 V
REF
(NOTE 3)
REF
ANALOG INPUT
IS USUALLY A 10µF CERAMIC CAPACITOR (X5R).
Digital Output Code
Hexadecimal
0x3FFF
0x2001
0x2000
0x1FFF
0x0001
0x0000
+FS – 1.5 LSB
(NOTE 1)
REF
(NOTE 4)
2.7nF
1
2
33Ω
IN+
+ FS – 1 LSB
IN+
(NOTE 2)
– V
– V
IN−
10µF
IN−
> V
Figure 22. Typical Application Diagram
< V
REF
GND
IN+
IN–
– V
).
GND
Rev. B | Page 14 of 24
GND
REF
).
AD7942
VDD
VIO
TYPICAL CONNECTION DIAGRAM
Figure 22 shows an example of the recommended connection
diagram for the AD7942 when multiple supplies are available.
Analog Input
Figure 24 shows an equivalent circuit of the input structure of
the AD7942.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs, IN+ and IN−. Care must be taken to ensure that
the analog input signal never exceeds the supply rails by more
than 0.3 V because this causes these diodes to become forward-
biased and to start conducting current. However, these diodes
can handle a forward-biased current of 130 mA maximum. For
instance, these conditions could eventually occur when the
input buffer (U1) supplies are different from VDD. In such a
case, an input buffer with a short-circuit current limitation can
be used to protect the part.
This analog input structure allows the sampling of the diffe-
rential signal between IN+ and IN−. By using this differential
input, small signals common to both inputs are rejected, as
shown in Figure 25, which represents the typical CMRR over
frequency. For instance, by using IN− to sense a remote signal
ground, ground potential differences between the sensor and
the local ADC ground are eliminated.
SCK
SDO
CNV
SDI
OR IN–
GND
IN+
100nF
100nF
Figure 24. Equivalent Analog Input Circuit
3- OR 4-WIRE INTERFACE (NOTE 5)
5V
1.8V TO VDD
C
PIN
VDD
D1
D2
R
IN
C
IN

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