AD7732 Analog Devices, AD7732 Datasheet - Page 14

• Manufacturer Part Number: AD7732
• Manufacturer: Analog Devices

Specifications of AD7732

• Resolution (bits): 24bit
• # Chan: 2
• Sample Rate: 3.05MSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: Bip 10V,Bip 5.0V,Uni 10V,Uni 5.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7732
REGISTER DESCRIPTION
Table 11. Register Summary
Register
Communications
I/O Port
Revision
Test
ADC Status
Checksum
ADC Zero-Scale Calibration
ADC Full-Scale
Channel Data
Channel Zero-Scale Cal.
Channel Full-Scale Cal.
Channel Status
Channel Setup
Channel Conversion Time
Mode
1
2
Table 12. Operational Mode Summary
MD2
0
0
0
0
1
1
1
1
Bit 1 in the communication register specifies the channel number of the register being accessed.
There is only one mode register, although the mode register can be accessed in one of two address locations. The address used to write the mode register specifies the
ADC channel on which the mode will be applied. Only address 38h must be used for reading from the mode register.
2
MD1
0
0
1
1
0
0
1
1
1
1
1
MD0
0
1
0
1
0
1
0
1
1
1
Mode
Idle Mode
Continuous Conversion Mode
Single Conversion Mode
Power-Down (Standby) Mode
ADC Zero-Scale Self-Calibration
For Future Use
Channel Zero-Scale System Calibration
Channel Full-Scale System Calibration
1
Addr
(hex)
08, 0A
18, 1A
28, 2A
38, 3A
10, 12
20, 22
30, 32
00
01
02
03
04
05
06
07
Dir
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
R
R
P0 Pin
CHOP
Bit 7
MD2
P0
0
x
–
0
0
0
0
1
0
Channel Number
Chip Revision Code
Rev. A | Page 14 of 32
P1 Pin
Bit 6
MD1
R/W
CH1
P1
–
0
0
0
0
x
24-Bit Channel Zero-Scale Calibration Registers
24-Bit Channel Full-Scale Calibration Registers
24-Bit ADC Zero-Scale Calibration Register
P0 DIR
Bit 5
MD0
Table 13. Input Range Summary
RNG1
0
0
1
1
1
x
–
0
0
0
0
0
24-Bit Manufacturing Test Register
24-Bit ADC Full-Scale Register
16-Bit Checksum Register
16-/24-Bit Data Registers
Stat OPT
CLKDIS
P1 DIR
Bit 4
0/P0
RNG0
0
1
0
1
Default Value
1
–
0
0
0
0
x
FW (7-Bit Filter Word)
800000h
800000h
800000h
200000h
8000h
6-Bit Register Address
ENABLE
RDY/P1
RDYFN
DUMP
Bit 3
11h
±10 V
0 V to +10 V
±5 V
0 V to +5 V
Nominal Input Voltage Range
0
0
–
0
0
0
0
Cont RD
Chip Generic Code
NOREF
RDY1
Bit 2
0
0
1
0
0
0
0
0
24/16 BIT
RNG1
Bit 1
SIGN
0
0
0
–
0
0
0
0
CLAMP
SYNC
RDY0
RNG0
Bit 0
OVR
0
0
0
0
0
0