AD7732 Analog Devices, AD7732 Datasheet - Page 19

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AD7732

Manufacturer Part Number
AD7732
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7732

Resolution (bits)
24bit
# Chan
2
Sample Rate
3.05MSPS
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni
Ain Range
Bip 10V,Bip 5.0V,Uni 10V,Uni 5.0V
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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Channel Setup Registers
8 Bits, Read/Write Register, Address 28h, 2Ah, Default Value 00h
These registers are used to configure the selected channel, to configure its input voltage range, and to set up the corresponding channel
status register.
Bit
Mnemonic
Default
Bit
7–5
4
3
2
1–0
Table 15.
RNG1
0
0
1
1
Channel Conversion Time Registers
8 Bits, Read/Write Register, Address 30h, 32h, Default Value 91h
The conversion time registers enable or disable chopping and configure the digital filter for a particular channel. This register value
affects the conversion time, frequency response, and noise performance of the ADC.
Bit
Mnemonic
Default
Bit
7
6–0
Mnemonic
CHOP
FW
Mnemonic
0
Stat OPT
ENABLE
0
RNG1–RNG0
RNG0
0
1
0
1
Nominal Input Voltage Range
±10 V
0 V to +10 V
±5 V
0 V to +5 V
Bit 7
0
Description
These bits must be 0 for proper operation.
Status Option. When this bit is set to 1, the P0 and P1 bits in the channel status register will reflect the state of
the P0 and P1 pins. When this bit is reset to 0, the RDY bit in the channel status register will reflect the channel
corresponding to the RDY bit in the ADC status register.
Channel Enable. Set this bit to 1 to enable the channel in the continuous conversion mode. A single
conversion will take place regardless of this bit’s value.
This bit must be 0 for proper operation.
This is the channel input voltage range (see Table 15).
Description
Chopping Enable Bit. Set to 1 to apply chopping mode for a particular channel.
CHOP = 1, single conversion or continuous conversion with one channel enabled.
Conversion Time (μs) = (FW × 128 + 248)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 1, continuous conversion with two channels enabled.
Conversion Time (μs) = (FW × 128 + 249)/MCLK Frequency (MHz), the FW range is 2 to 127.
CHOP = 0, single conversion or continuous conversion with one channel enabled.
Conversion Time (μs) = (FW × 64 + 206)/MCLK Frequency (MHz), the FW range is 3 to 127.
CHOP = 0, continuous conversion with two channels enabled.
Conversion Time (μs) = (FW × 64 + 207)/MCLK Frequency (MHz), the FW range is 3 to 127.
0
Bit 7
CHOP
1
Bit 6
0
0
Bit 6
Bit 5
0
0
Bit 5
Rev. A | Page 19 of 32
Stat OPT
Bit 4
0
Bit 4
FW (7-Bit Filter Word)
Bit 3
ENABLE
0
Bit 3
11h
Bit 2
0
0
Bit 2
Bit 1
RNG1
0
Bit 1
AD7732
Bit 0
RNG0
0
Bit 0

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