TDF8599A NXP Semiconductors, TDF8599A Datasheet - Page 7

• Manufacturer Part Number: TDF8599A
• Description: The TDF8599A is a dual Bridge-Tied Load (BTL) car audio amplifier comprising anNDMOST-NDMOST output stage based on SOI BCDMOS technology
• Manufacturer: NXP Semiconductors

NXP Semiconductors
TDF8599A_2
Product data sheet
8.3.1 Master and slave mode selection
8.3 Pulse-width modulation frequency
Table 4.
[1]
Table 5.
[1]
The output signal from the amplifier is a PWM signal with a clock frequency of f
frequency is set by connecting a resistor (R
optimal clock frequency setting is between 300 kHz and 400 kHz. Connecting a resistor
with a value of 39 k , for example, sets the clock frequency to 320 kHz (see
The external capacitor (C
however, reduce jitter and sensitivity to disturbance. Using a 2
filter in the application generates an analog audio signal across the loudspeaker.
In a master and slave configuration, multiple TDF8599A devices are daisy-chained
together in one audio application with a single device providing the clock frequency signal
for all other devices. In this situation, it is recommended that the oscillators of all devices
are synchronized for optimum EMI behavior as follows:
All OSCIO pins are connected together and one TDF8599A in the application is
configured as the clock-master. All other TDF8599A devices are configured as
clock-slaves (see
Table 6.
Pin EN
HIGH (S2 closed)
LOW (S2 open)
Pin EN
HIGH (S2 closed)
LOW (S2 open)
Mode
Master
Slave
•
•
X = do not care.
X = do not care.
The clock-master pin OSCIO is configured as the oscillator output. When a resistor
(R
mode.
The clock-slave pins OSCIO are configured as the oscillator inputs. When pin
OSCSET is directly connected to pin AGND (see
mode.
osc
) is connected between pins OSCSET and AGND, the TDF8599A is in Master
I
Non-I
Mode setting pin OSCIO
2
C-bus mode operation
2
Settings
Pin OSCSET
R
R
C-bus mode operation
osc
osc
Figure
> 26 k
= 0 ; shorted to pin AGND
Pin SEL_MUTE
HIGH
LOW
LOW
X
Pin SEL_MUTE
HIGH (S1 open)
LOW (S1 closed)
X
Rev. 02 — 30 June 2009
[1]
[1]
5).
osc
) has no influence on the oscillator frequency. It does
I
2
C-bus controlled dual channel class-D power amplifier
Bit IB1[D0]
1
1
0
X
[1]
osc
) between pins OSCSET and AGND. The
Table
Pin OSCIO
output
input
Bit IB2[D0]
0
1
X
X
[1]
[1]
6), the TDF8599A is in Slave
nd
order LC demodulation
TDF8599A
Mode
Operating mode
Mute mode (default)
off
© NXP B.V. 2009. All rights reserved.
Mode
Operating mode
Mute mode
Standby mode
off (default)
Figure
osc
. This
5).
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