LPC1759FBD80 NXP Semiconductors, LPC1759FBD80 Datasheet - Page 20
Manufacturer Part Number
The LPC1759 is a Cortex-M3 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 120 MHz
Product data sheet
7.12.2 USB host controller (LPC1759/58/56/54 only).
7.12.3 USB OTG controller (LPC1759/58/56/54 only).
7.13 CAN controller and acceptance filters
The host controller enables full- and low-speed data exchange with USB devices attached
to the bus. It consists of a register interface, a serial interface engine, and a DMA
controller. The register interface complies with the Open Host Controller Interface (OHCI)
USB OTG is a supplement to the USB 2.0 specification that augments the capability of
existing mobile devices and USB peripherals by adding host functionality for connection to
The OTG Controller integrates the host controller, device controller, and a master-only
interface controls an external OTG transceiver.
The Controller Area Network (CAN) is a serial communications protocol which efficiently
supports distributed real-time control with a very high level of security. Its domain of
application ranges from high-speed networks to low cost multiplex wiring.
The CAN block is intended to support multiple CAN buses simultaneously, allowing the
device to be used as a gateway, switch, or router among a number of CAN buses in
industrial or automotive applications.
Remark: LPC1754/52/51 have only one CAN bus.
C-bus interface to implement OTG dual-role device functionality. The dedicated I
While USB is in the Suspend mode, the LPC1759/58/56/54/52/51 can enter one of the
reduced power modes and wake up on USB activity.
Supports DMA transfers with all on-chip SRAM blocks on all non-control endpoints.
Allows dynamic switching between CPU-controlled slave and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
One downstream port.
Supports port power switching.
Fully compliant with On-The-Go supplement to the USB 2.0 Specification, Revision
Hardware support for Host Negotiation Protocol (HNP).
Includes a programmable timer required for HNP and Session Request Protocol
Supports any OTG transceiver compliant with the OTG Transceiver Specification
(CEA-2011), Rev. 1.0.
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 29 March 2011
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
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