STM32F407VG STMicroelectronics, STM32F407VG Datasheet - Page 133

• Manufacturer Part Number: STM32F407VG
• Description: High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
• Manufacturer: STMicroelectronics

Specifications of STM32F407VG

• Core: ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• 3×12-bit, 2.4 Msps A/d Converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
• General-purpose Dma: 16-stream DMA controller with FIFOs and burst support
• Up To 17 Timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
• 10/100 Ethernet Mac With Dedicated Dma: supports IEEE 1588v2 hardware, MII/RMII
• Rtc: subsecond accuracy, hardware calendar

STM32F405xx, STM32F407xx
Figure 57. Synchronous multiplexed PSRAM write timings
Table 76.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
d(CLKL-NADVH)
t
t
d(CLKL-NADVL)
t
t
d(CLKL-NWEH)
t
d(CLKL-NWEL)
d(CLKL-NBLH)
d(CLKL-NExH)
d(CLKL-NExL)
d(CLKL-ADIV)
d(CLKL-DATA)
t
t
d(CLKL-AIV)
d(CLKL-AV)
Symbol
L
t
w(CLK)
= 30 pF.
Synchronous multiplexed PSRAM write timings
FSMC_CLK period
FSMC_CLK low to FSMC_NEx low (x=0..2)
FSMC_CLK low to FSMC_NEx high (x= 0…2)
FSMC_CLK low to FSMC_NADV low
FSMC_CLK low to FSMC_NADV high
FSMC_CLK low to FSMC_Ax valid (x=16…25)
FSMC_CLK low to FSMC_Ax invalid (x=16…25)
FSMC_CLK low to FSMC_NWE low
FSMC_CLK low to FSMC_NWE high
FSMC_CLK low to FSMC_AD[15:0] invalid
FSMC_A/D[15:0] valid data after FSMC_CLK low
FSMC_CLK low to FSMC_NBL high
Doc ID 022152 Rev 2
Parameter
(1)(2)
Electrical characteristics
2T
Min
HCLK
1
0
8
0
0
0
-
-
-
-
-
Max
0.5
1
0
0
3
-
-
-
-
-
-
-
133/167
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns