STM32F407VG STMicroelectronics, STM32F407VG Datasheet - Page 32

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STM32F407VG

Manufacturer Part Number
STM32F407VG
Description
High-performance and DSP with FPU, ARM Cortex-M4 MCU with 1 Mbyte Flash, 168 MHz CPU, Art Accelerator, Ethernet
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F407VG

Core
ARM 32-bit Cortex™-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
3×12-bit, 2.4 Msps A/d Converters
up to 24 channels and 7.2 MSPS in triple interleaved mode
General-purpose Dma
16-stream DMA controller with FIFOs and burst support
Up To 17 Timers
up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII
Rtc
subsecond accuracy, hardware calendar

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Description
Table 4.
2.2.23
2.2.24
32/167
USART1
USART2
USART3
USART6
USART
UART4
UART5
name
Standard
features
X
X
X
X
X
X
USART feature comparison
Serial peripheral interface (SPI)
The STM32F40x feature up to three SPIs in slave and master modes in full-duplex and
simplex communication modes. SPI1 can communicate at up to 37.5 Mbits/s, SPI2 and
SPI3 can communicate at up to 21 Mbit/s. The 3-bit prescaler gives 8 master mode
frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC
generation/verification supports basic SD Card/MMC modes. All SPIs can be served by the
DMA controller.
The SPI interface can be configured to operate in TI mode for communications in master
mode and slave mode.
Inter-integrated sound (I
Two standard I
operated in master or slave mode, in full duplex and simplex communication modes, and
can be configured to operate with a 16-/32-bit resolution as an input or output channel.
Audio sampling frequencies from 8 kHz up to 192 kHz are supported. When either or both of
the I
external DAC/CODEC at 256 times the sampling frequency.
All I
2
2
Sx can be served by the DMA controller.
(RTS/CTS)
S interfaces is/are configured in master mode, the master clock can be output to the
Modem
X
X
X
X
-
-
2
S interfaces (multiplexed with SPI2 and SPI3) are available. They can be
LIN
X
X
X
X
X
X
master
SPI
X
X
X
X
-
-
Doc ID 022152 Rev 2
irDA
2
X
X
X
X
X
X
S)
Smartcard
(ISO 7816)
X
X
X
X
-
-
Max. baud rate
(oversampling
in Mbit/s
by 16)
5.25
2.62
2.62
2.62
2.62
5.25
STM32F405xx, STM32F407xx
Max. baud rate
(oversampling
in Mbit/s
by 8)
10.5
5.25
5.25
5.25
5.25
10.5
mapping
84 MHz)
42 MHz)
42 MHz)
42 MHz)
42 MHz)
84 MHz)
APB2
APB1
APB1
APB1
APB1
APB2
(max.
(max.
(max.
(max.
(max.
(max.
APB

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