ST10F273Z4 STMicroelectronics, ST10F273Z4 Datasheet - Page 140
ST10F273Z4
Manufacturer Part Number
ST10F273Z4
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet
1.ST10F273Z4.pdf
(188 pages)
Specifications of ST10F273Z4
Single Voltage Supply
5 V ±10%
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Electrical characteristics
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A real filter, can typically be obtained by using a series resistance with a capacitor on the
input pin (simple RC Filter). The RC filtering may be limited according to the value of source
impedance of the transducer or circuit supplying the analog signal to be measured. The filter
at the input pins must be designed taking into account the dynamic characteristics of the
input signal (bandwidth).
Figure 38. A/D converter input pins scheme
Input leakage and external circuit
The series resistor utilized to limit the current to a pin (see R
with a large source impedance can lead to a degradation of A/D converter accuracy when
input leakage is present.
Data about maximum input leakage current at each pin are provided in the Data Sheet
(Electrical Characteristics section). Input leakage is greatest at high operating temperatures,
and in general it decreases by one half for each 10° C decrease in temperature.
Considering that, for a 10-bit A/D converter one count is about 5mV (assuming V
an input leakage of 100nA acting though an R
error of exactly one count (5mV); if the resistance were 100kΩ the error would become two
counts.
Eventual additional leakage due to external clamping diodes must also be taken into
account in computing the total leakage affecting the A/D converter measurements. Another
contribution to the total leakage is represented by the charge sharing effects with the
sampling capacitance: being C
equal to the conversion rate of a single channel (maximum when fixed channel continuous
conversion mode is selected), it can be seen as a resistive path to ground. For instance,
assuming a conversion rate of 250 kHz, with C
obtained (R
channel). To minimize the error induced by the voltage partitioning between this resistance
V
A
EQ
Source
= 1 / f
R
EXTERNAL CIRCUIT
S
C
C
R
R
C
R
R
R
C
C
S
S
F
F
L
SW
AD
P
S
, where f
Filter
R
F
C
Source impedance
Filter resistance
Filter capacitance
Current limiter resistance
Channel selection switch impedance
Sampling switch impedance
Pin capacitance (two contributions, C
Sampling capacitance
S
F
substantially a switched capacitance, with a frequency
C
represents the conversion rate at the considered
Current limiter
R
L
L
S
= 50kΩ of external resistance leads to an
equal to 4pF, a resistance of 1MΩ is
C
P1
INTERNAL CIRCUIT SCHEME
V
DD
L
in
selection
Channel
P1
Figure
R
and C
SW
C
P2
38), in combination
P2
Sampling
)
R
AD
C
ST10F273Z4
S
AREF
= 5V),
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