ST10F273Z4 STMicroelectronics, ST10F273Z4 Datasheet - Page 22
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ST10F273Z4
Manufacturer Part Number
ST10F273Z4
Description
16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
Manufacturer
STMicroelectronics
Datasheet
1.ST10F273Z4.pdf
(188 pages)
Specifications of ST10F273Z4
Single Voltage Supply
5 V ±10%
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Memory organization
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Memory organization
The memory space of the ST10F273Z4 is configured in a unified memory architecture.
Code memory, data memory, registers and I/O ports are organized within the same linear
address space of 16 Mbytes. The entire memory space can be accessed Byte wise or Word
wise. Particular portions of the on-chip memory have additionally been made directly bit
addressable.
IFlash: 512 Kbytes of on-chip Flash memory. It is divided in 10 blocks (B0F0...B0F9) of the
Bank 0 and two blocks of Bank 1 (B1F0, B1F1): read-while-write operations inside the same
Bank are not allowed. When Bootstrap mode is selected, the Test-Flash Block B0TF
(8 Kbyte) appears at address 00’0000h: refer to
page 25
for IFlash is the following:
Table 3.
IRAM: 2 Kbytes of on-chip internal RAM (dual-port) is provided as a storage for data,
system stack, general purpose register banks and code. A register bank is 16 Wordwide (R0
to R15) and / or Bytewide (RL0, RH0, …, RL7, RH7) general purpose registers group.
XRAM: 32 K + 2 Kbytes of on-chip extension RAM (single port XRAM) is provided as a
storage for data, user stack and code.
The XRAM is divided into two areas, the first 2 Kbytes named XRAM1 and the second
32 Kbytes named XRAM2, connected to the internal XBUS and are accessed like an
external memory in 16-bit demultiplexed bus-mode without wait state or read/write delay
(31.25ns access at 64 MHz CPU clock). Byte and Word accesses are allowed.
The XRAM1 address range is 00’E000h - 00’E7FFh if XPEN (bit 2 of SYSCON register),
and XRAM1EN (bit 2 of XPERCON register) are set. If XRAM1EN or XPEN is cleared, then
any access in the address range 00’E000h - 00’E7FFh will be directed to external memory
for more details on memory mapping in boot mode. The summary of address range
Blocks
B0TF
Summary of IFlash address range
B0F0
B0F1
B0F2
B0F3
B0F4
B0F5
B0F6
B0F7
B0F8
B0F9
B1F0
B1F1
01’8000h - 01’FFFFh
02’0000h - 02’FFFFh
03’0000h - 03’FFFFh
04’0000h - 04’FFFFh
05’0000h - 05’FFFFh
06’0000h - 06’FFFFh
07’0000h - 07’FFFFh
08’0000h - 08’FFFFh
00’0000h - 00’1FFFh
00’2000h - 00’3FFFh
00’4000h - 00’5FFFh
00’6000h - 00’7FFFh
User mode
Not visible
Chapter 5: Internal Flash memory on
Size
32K
64K
64K
64K
64K
64K
64K
64K
8 K
8 K
8 K
8 K
8 K
ST10F273Z4
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