ST10F273Z4 STMicroelectronics, ST10F273Z4 Datasheet - Page 147

• Manufacturer Part Number: ST10F273Z4
• Description: 16-BIT MICROCONTROLLER WITH MAC UNIT, UP TO 832 KBYTES FLASH MEMORY AND UP TO 68 KBYTES RAM
• Manufacturer: STMicroelectronics

Specifications of ST10F273Z4

• Single Voltage Supply: 5 V ±10%

ST10F273Z4
24.8.3
24.8.4
Clock generation modes
Next
generation mode.
Table 70.
1. The external clock input range refers to a CPU clock range of 1...64 MHz. Besides, the PLL usage is limited
2. The limits on input frequency are 4 to 12 MHz since the usage of the internal oscillator amplifier is required.
3. The maximum depends on the duty cycle of the external clock signal: When 64 MHz is used, 50% duty
Prescaler operation
When pins P0.15-13 (P0H.7-5) equal ’001’ during reset, the CPU clock is derived from the
internal oscillator (input clock signal) by a 2:1 prescaler.
The frequency of f
the duration of an individual TCL) is defined by the period of the input clock f
The timings listed in the AC Characteristics that refer to TCL therefore can be calculated
using the period of f
Note that if the bit OWDDIS in SYSCON register is cleared, the PLL runs on its free-running
frequency and delivers the clock signal for the Oscillator Watchdog. If bit OWDDIS is set,
then the PLL is switched off.
1
1
1
1
0
0
0
to 4 to 12 MHz input frequency range. All configurations need a crystal (or ceramic resonator) to generate
the CPU clock through the internal oscillator amplifier (apart from Direct Drive): vice versa, the clock can be
forced through an external clock source only in Direct Drive mode (on-chip oscillator amplifier disabled, so
no crystal or resonator can be used).
Also when the PLL is not used and the CPU clock corresponds to F
shall be used: it is not possible to force any clock though an external clock source.
cycle shall be granted (low phase = high phase = 7.8ns); when 32 MHz is selected, a 25% duty cycle can
be accepted (minimum phase, high or low, again equal to 7.8ns).
(P0H.7-5)
P0.15-13
Table 70
1
1
0
0
1
1
0
1
0
1
0
1
0
1
On-chip clock generator selections
associates the combinations of these three bits with the respective clock
f
CPU frequency
CPU
CPU
F
XTAL
F
F
F
F
F
F
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
XTAL
= f
is half the frequency of f
XTAL
for any TCL.
x 10
x 4
x 3
x 8
x 5
x 1
/ 2
x F
External clock input range
Main OSC (MHz)
5.3 to 10.6
6.4 to 12
4 to 6.4
XTAL
1 to 64
4 to 12
4 to 8
4 to 8
and the high and low time of f
XTAL
/2, an external crystal or resonator
(1) (2)
Electrical characteristics
Default configuration
Direct drive
(oscillator bypassed)
CPU clock via prescaler
Notes
XTAL
.
CPU
147/188
(i.e.
(3)
(2)