FR011L5J Fairchild Semiconductor, FR011L5J Datasheet - Page 10

• Manufacturer Part Number: FR011L5J
• Manufacturer: Fairchild Semiconductor

© 2012 Fairchild Semiconductor Corporation
FR011L5J • Rev. C
Typical Application Waveforms
Typical USB3.0 conditions.
Application Information
Figure 17 shows the voltage and current waveforms
when a virtual USB3.0 device is connected to a 5V
source. A USB application allows a maximum source
output capacitance of C
device-side input capacitance of C
maximum load (minimum resistance) of R
100µF, C
When the DC power source is connected to the circuit
(refer to Figure 13), the built-in startup diode initially
conducts the current such that the USB device powers
up. Due to the initial diode voltage drop, the FR011L5J
effectively reduces the peak inrush current of a hot plug
event. Under these test conditions, the input inrush
current reaches about 6.3A peak. While the current
flows, the input voltage increases. The speed of this
input voltage increase depends on the time constant
formed by the load resistance R
C
voltage increase. As the input voltage approaches a
level equal to the protector’s turn-on voltage, V
protector turns on and operates in Low-Resistance
Mode as defined by V
In the event of a negative transient, or when the DC
power source is reversely connected to the circuit, the
device blocks the flow of current and holds off the
voltage, thereby protecting the USB device. Figure 18
shows the voltage and current waveforms when a virtual
2
. The larger the time constant, the slower the input
2
Figure 19. Startup Waveform without FR011L5J, DC Power Source=5V, C
= 10µF and R
IN
and operating current I
3
1
= 27Ω were used for testing.
= 120µF and a maximum
3
and load capacitance
2
= 10µF plus a
3
= 27Ω. C
(Continued)
IN
.
ON
, the
R
1
1
=
─
─
=R
10
V
i
2
IN
=10kΩ, R
IN
, 2A/div. The input current
USB3.0 device is reversely biased; the output voltage is
near 0 and response time is less than 50ns.
Figure 19 shows the voltage and current waveforms
when no reverse bias protection is implemented. In
Figure 17, while the reverse bias protector is present,
the input voltage, V
separated and look different. When this reverse bias
protector is removed, V
Figure 19 as V
the load circuit. It can be seen that, with reverse bias
protection, the voltage applied to the load and the
current flowing into the load look very much the same as
without reverse bias protection.
Benefits of Reverse Bias Protection
The most important benefit is to prevent accidently
reverse-biased voltage from damaging the USB load.
Another benefit is that, the peak startup inrush current
can be reduced. How fast the input voltage rises, the
input/output capacitance, the input voltage, and how
heavy the load is determine how much the inrush
current can be reduced. In a 5V USB application, for
example, the inrush current can be 5% - 20% less with
different input voltage rising rate and other factors. This
can offer a system designer the option of increasing C
while keeping “effective” USB device capacitance down.
, 2V/div. The voltage applied on the load circuit
3
=27Ω
IN
. This V
IN
, and the output voltage, V
IN
IN
1
and V
is also the voltage applied to
=100µF, C
O
merge, as shown in
Time: 5us/div
2
=10uF,
www.fairchildsemi.com
O
, are
2