FR011L5J Fairchild Semiconductor, FR011L5J Datasheet - Page 11

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FR011L5J

Manufacturer Part Number
FR011L5J
Description
Manufacturer
Fairchild Semiconductor
Datasheet
© 2012 Fairchild Semiconductor Corporation
FR011L5J • Rev. C
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
Figure 20. 6-Lead, Molded Leadless Package (MLP), Dual, Non-JEDEC, 2mm Square, Single-Tied DAP
D. DRAWING FILENAME: MKT-MLP06Lrev3.
A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
MO-229 DATED AUG/2003
ASME Y14.5M, 1994
Pin #1 location
PIN #1 IDENT
0.8 MAX
0.08 C
0.10 C
6X
SEATING
PLANE
2X
0.33
0.20
0.50
0.10 C
0.05
0.00
0.65
BOTTOM VIEW
6
1
TOP VIEW
SIDE VIEW
1.00
0.80
1.30
2.00
3
0.15
4
0.50
0.30
A
0.35
0.25
2.00
0.61
0.51
(0.20)
0.10
0.05
B
2X
C
1.05
0.95
6X
0.10 C
C A B
C
11
RECOMMENDED LAND PATTERN OPT 1
RECOMMENDED LAND PATTERN OPT 2
(0.475)
0.65 TYP
0.65 TYP
1.05
1.05
1
1
6
6
1.00
1.00
4
4
(0.20)
3
3
0.20
0.45
0.66
0.40 TYP
0.40 TYP
1.35
1.35
No Traces allowed in
this Area
2.30
2.30
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