CS61310-IP Cirrus Logic, Inc., CS61310-IP Datasheet - Page 14

• Manufacturer Part Number: CS61310-IP
• Description: T1 line interface unit
• Manufacturer: Cirrus Logic, Inc.

2.12.2 Control Register 2: Address 0x11
AIS
RAMPLSE
LOOPDN
LOOPUP
RPWDN
TxHIZ
RSVD
2.12.3 Equalizer Gain (EQGAIN): Address 0x12
EQ[4:0]
2.12.4 RAM Address (RAM): Address 0x13
RAM[7:0]
14
7 (MSB)
7 (MSB)
7 (MSB)
RAM.7
AIS
X
RAMPLSE
RAM.6
6
AIS = 1 when an all ones pattern is present at the receiver. This bit is reset to “0” by the first
read occurring after the AIS condition has cleared.
An interrupt will occur when AIS is present unless a “1” is written to AIS disabling the interrupt.
grammable, transmit RAM.
Setting LOOPDN to “1” causes the data pattern 001... to be repetitively transmitted.
Setting LOOPUP to “1” causes the data pattern 00001... to be repetitively transmitted.
When RPWDN = 1, the receiver circuitry is powered down, but the transmitter is still active.
When TxHIZ = 1 the transmitter goes to a low-power, high-impedance state
LSBs of this register, EQ4 - EQ0. 00001 corresponds to -2 dB, 10100 corresponds to -40 dB.
The three MSBs are don’t cares.
a special write procedure must be followed to write the waveform RAM.
Alarm Indication Signal.
When RAMPLSE = 1, output pulse shapes are determined by the codes in the internal, pro-
Loop Down
Loop Up
Receiver Power Down
Transmitter High Impedance
Reserved. Set to 0 for proper operation.
The receive equalizer gain settings are broken down into 20 segments and provided at the five
The RAM address pointer for the arbitrary waveform memory;
X
6
6
set to “0”
RAM.5
RSVD
5
X
5
5
LOOPDN
RAM.4
EQ4
4
4
4
RAM.3
LOOPUP
EQ3
3
3
3
RAM.2
EQ2
RPWDN
2
2
2
RAM.1
EQ1
TxHIZ
1
1
1
CS61310
set to “0”
DS440PP2
0 (LSB)
0 (LSB)
0 (LSB)
RAM.0
RSVD
EQ0