MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 114

• Manufacturer Part Number: MC56F836
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

6.5.1
6.5.1.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.1.2
114
•
•
Offset
Add.
$A
$B
$C
$D
$E
$F
$0
$1
$2
$3
$4
$5
$6
$7
$8
Base + $0
0 = OnCE clock to 56800E core enabled when core TAP is enabled
1 = OnCE clock to 56800E core is always enabled
RESET
Write
Read
SIM_LSH_ID
SIM_PUDR
SIM_ISALH
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_MSH_
SIM_ISALL
CONTROL
SIM_PCE2
Register
SIM_GPS
SIM_PCE
Reserved
CLKOSR
RSTSTS
SIM Control Register (SIM_CONTROL)
Name
SIM_
SIM_
SIM_
Reserved—Bits 15–6
OnCE Enable (OnCE EBL)—Bit 5
ID
15
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
0
0
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
EMI
15
0
0
0
1
0
0
0
1
0
Figure 6-3 SIM Control Register (SIM_CONTROL)
14
0
0
= Reserved
PWMA1
ADCB
14
0
0
0
1
0
0
1
0
13
Figure 6-2 SIM Register Map Summary
0
0
ADCA
CAN
13
0
0
0
0
0
0
1
0
12
0
0
MODE
EMI_
CAN
12
0
0
0
1
0
0
1
0
56F8365 Technical Data, Rev. 7
11
0
0
RESET
DEC1
11
0
0
0
0
0
0
1
0
10
0
0
DEC 0 TMRD
IRQ
10
0
0
0
0
0
0
1
0
9
0
0
XBOOT PWMB PWMA0
A23
9
0
0
0
0
0
1
0
8
0
0
TMRC
A22
8
0
0
1
0
0
1
0
ISAL[21:6]
FIELD
FIELD
FIELD
FIELD
7
0
0
TMRB
A21
7
0
0
1
0
0
1
0
6
0
0
TMRA
A20
6
0
0
1
0
0
0
1
0
ONCE
EBL0
5
0
CLKDIS
ONCE
CTRL
EBL0
SWR
SCI1
D1
5
0
0
1
0
RST
SW
4
0
COPR
SCI0
RST
SW
D0
4
1
1
0
1
0
3
DISABLE
0
EXTR
JTAG
STOP_
SPI1
Freescale Semiconductor
C3
3
0
1
1
0
DISABLE
STOP_
CLKOSEL
2
0
POR
SPI0
C2
2
1
1
0
1
0
PWMB PWMA
1
DISABLE
0
C1
ISAL[23:22]
1
0
1
0
0
0
WAIT_
DISABLE
WAIT_
Preliminary
CAN2
C0
0
0
0
0
1
0
0