MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 38

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MC56F836

Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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On-chip memory sizes for each device are summarized in
identified in the “Use Restrictions” column of
Note: Data Flash and Program RAM are NOT available on the 56F8165 device.
4.2 Program Map
The Program memory map is located in
Operating Mode Register (OMR) control the Program memory map. At reset, these bits are set as indicated
in
EXT_BOOT = EMI_MODE = 0 and cannot be changed in the 56F8365 or 56F8165.
Note: Program RAM is NOT available on the 56F8165 device.
38
Program Flash
Data Flash
Program RAM
Data RAM
Program Boot Flash
Table
On-Chip Memory
Flash Secured
OMR MB =
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
State
4-2.
0
0
1
2,3
EXTBOOT Pin
OMR MA =
56F8365
512KB
32KB
32KB
32KB
4KB
0
1
0
Table 4-1 Chip Memory Configurations
Table 4-2 OMR MB/MA Value at Reset
Mode 0 – Internal Boot; EMI is configured to use 16 address lines; Flash
Memory is secured; external P-space is not allowed; the EOnCE is disabled
Not valid; cannot boot externally if the Flash is secured and will actually
configure to 00 state
Mode 0 – Internal Boot; EMI is configured to use 16 address lines
56F8165
56F8365 Technical Data, Rev. 7
512KB
32KB
32KB
Table
Table
4-4. The operating mode control bits (MA and MB) in the
Erase/Program via Flash interface unit and word writes to
CDBW
Erase/Program via Flash interface unit and word writes to
CDBW. Data Flash can be read via either CDBR or XDB2, but
not by both simultaneously
None
None
Erase/Program via Flash Interface unit and word writes to
CDBW
4-1.
Chip Operating Mode
Table
4-1. Flash memories’ restrictions are
Use Restrictions
1
Freescale Semiconductor
Preliminary

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