MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 150

• Manufacturer Part Number: MC56F836
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

10.6 Phase Locked Loop Timing
10.7 Crystal Oscillator Timing
150
1. An externally supplied reference clock should be as free as possible from any phase jitter for the PLL to work
2. ZCLK may not exceed 60MHz. For additional information on ZCLK and (f
3. This is the minimum time required after the PLL set up is changed to ensure reliable operation.
External reference crystal frequency for the PLL
PLL output frequency
PLL stabilization time
correctly. The PLL is optimized for 8MHz input crystal.
the 56F8300 Peripheral User Manual.
Crystal Start-up time
Resonator Start-up time
Crystal ESR
Crystal Peak-to-Peak Jitter
Crystal Min-Max Period Variation
Resonator Peak-to-Peak Jitter
Resonator Min-Max Period Variation
External
Note: The midpoint is V
Clock
Characteristic
Characteristic
10%
50%
90%
2
3
-40° to +125°C
(f
OUT
t
PW
Table 10-15 Crystal Oscillator Parameters
IL
)
+ (V
Figure 10-3 External Clock Timing
IH
– V
IL
Table 10-14 PLL Timing
56F8365 Technical Data, Rev. 7
)/2.
t
PW
1
Symbol
R
T
T
T
T
T
T
ESR
CS
RS
PV
RP
RJ
D
Symbol
f
t
f
osc
plls
op
0.12
Min
0.1
70
—
—
—
4
Min
OUT
160
t
—
fall
4
/2), please refer to the OCCS chapter in
0.18
Typ
—
—
—
—
—
5
Typ
—
8
1
Max
120
250
300
300
1.5
10
1
t
rise
Freescale Semiconductor
Max
260
8.4
10
10%
50%
90%
ohms
Unit
ms
ms
ps
ns
ps
ps
V
V
MHz
MHz
Unit
ms
IH
IL
Preliminary