MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 25

• Manufacturer Part Number: MC56F836
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Preliminary
PHASEA0
PHASEB0
(GPIOC4)
(GPIOC5)
Signal
Name
TRST
(TA0)
(TA1)
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Pin No.
114
127
128
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Type
Input
Input
Input
pulled high
internally
enabled
enabled
During
56F8365 Technical Data, Rev. 7
pull-up
pull-up
Reset
Input,
Input,
Input,
State
Test Reset — As an input, a low signal on this pin provides a
reset signal to the JTAG TAP controller. To ensure complete
hardware reset, TRST should be asserted whenever RESET is
asserted. The only exception occurs in a debugging environment
when a hardware device reset is required and the JTAG/EOnCE
module must not be reset. In this case, assert RESET, but do not
assert TRST.
To deactivate the internal pull-up resistor, set the JTAG bit in the
SIM_PUDR register.
Note:
design is to be used in a debugging environment, TRST may be tied to
V
Phase A — Quadrature Decoder 0, PHASEA input
TA0 — Timer A, Channel 0
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is PHASEA0.
To deactivate the internal pull-up resistor, clear bit 4 of the
GPIOC_PUR register.
Phase B — Quadrature Decoder 0, PHASEB input
TA1 — Timer A, Channel 1
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is PHASEB0.
To deactivate the internal pull-up resistor, clear bit 5 of the
GPIOC_PUR register.
SS
through a 1K resistor.
For normal operation, connect TRST directly to V
Signal Description
SS
. If the
Signal Pins
25