MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 121
MC56F836
Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F836.pdf
(172 pages)
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Two Input/Output pins associated with GPIOD can function as GPIO, EMI (default peripheral) or CAN2
signals. GPIO is the default and is enabled/disabled via the GPIOD_PER, as shown in
Table
between EMI and CAN2 inputs/outputs is made here in the GPS.
Freescale Semiconductor
Preliminary
1. This applies to the four pins that serve as Quad Decoder / Quad Timer / SPI / GPIOC functions. A separate set of control bits
2. Reset configuration
3. Quad Decoder pins are always inputs and function in conjunction with the Quad Timer pins.
GPIO Input
GPIO Output
Quad Timer Input / Quad
Decoder Input
Quad Timer Output / Quad
Decoder Input
SPI input
SPI output
is used for each pin.
6-3. When GPIOD[1:0] are programmed to operate as peripheral input/output, then the choice
Pin Function
Figure 6-10 Overall Control of GPIOC Pads Using SIM_GPS Control
2
3
Table 6-2 Control of GPIOC Pads Using SIM_GPS Control
Quad Timer Controlled
SPI Controlled
0
0
1
1
1
1
SIM_ GPS Register
Control Registers
56F8365 Technical Data, Rev. 7
—
—
—
—
0
1
GPIO Controlled
—
—
0
0
1
1
0
1
GPIOC_PER Register
—
—
—
—
0
1
0
1
See the “Switch Matrix for Inputs to the Timer”
table in the 56F8300 Peripheral User Manual
for the definition of timer inputs based on the
Quad Decoder mode configuration.
See SPI controls for determining the direction
of each of the SPI pins.
I/O Pad Control
Comments
1
Figure 6-11
Register Descriptions
and
121