MC56F836 Freescale Semiconductor, Inc, MC56F836 Datasheet - Page 18

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MC56F836

Manufacturer Part Number
MC56F836
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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2.2 Signal Pins
After reset, each pin is configured for its primary function (listed first). Any alternate functionality must
be programmed.
EMI is not functional in this package; since only part of the address/data bus is bonded out, use as GPIO
pins.
Note: Signals in italics are NOT available in the 56F8165 device.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state. Other
states show the reset condition of the alternate function, which you get if the alternate pin function is
selected without changing the configuration of the alternate peripheral. For example, the A8/GPIOA0 pin
shows that it is tri-stated during reset. If the GPIOA_PER is changed to select the GPIO function of the
pin, it will become an input if no other registers are changed.
18
V
V
DDA_OSC_
DDA_ADC
Signal
V
V
V
V
V
V
V
Name
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
DD_IO
V
V
V
V
V
PLL
SS
SS
SS
SS
SS
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Pin No.
112
14
25
36
62
76
94
72
21
35
59
65
4
3
Supply
Supply
Supply
Supply
Type
During
56F8365 Technical Data, Rev. 7
Reset
State
I/O Power — This pin supplies 3.3V power to the chip I/O
interface and also the Processor core throught the on-chip voltage
regulator, if it is enabled.
ADC Power — This pin supplies 3.3V power to the ADC modules.
It must be connected to a clean analog power supply.
Oscillator and PLL Power — This pin supplies 3.3V power to the
OSC and to the internal regulator that in turn supplies the Phase
Locked Loop. It must be connected to a clean analog power
supply.
Ground — These pins provide ground for chip logic and I/O
drivers.
Signal Description
Freescale Semiconductor
Preliminary

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