P60ARM-B/IG/GP1N Zarlink Semiconductor, Inc., P60ARM-B/IG/GP1N Datasheet - Page 62

• Manufacturer Part Number: P60ARM-B/IG/GP1N
• Description: A Low Power, General Purpose 32 Bit RISC Microprocessor
• Manufacturer: Zarlink Semiconductor, Inc.

P60ARM-B
specify the operation the coprocessor is required to perform, CRn is the coprocessor register which is the
source or destination of the transferred information, and CRm is a second coprocessor register which may
be involved in some way which depends on the particular operation specified.
4.13.2 Transfers to R15
When a coprocessor register transfer to ARM60 has R15 as the destination, bits 31, 30, 29 and 28 of the
transferred word are copied into the N, Z, C and V flags respectively. The other bits of the transferred word
are ignored, and the PC and other CPSR bits are unaffected by the transfer.
4.13.3 Transfers from R15
A coprocessor register transfer from ARM60 with R15 as the source register will store the PC+12.
4.13.4 Instruction Cycle Times
MRC instructions take 1S + bI +1C incremental cycles to execute, where S, I and C are as defined in section
5.1 Cycle types on page 65.
MCR instructions take 1S + (b+1)I +1C incremental cycles to execute.
b
4.13.5 Assembler syntax
<MCR|MRC>{cond} p#,<expression1>,Rd,cn,cm{,<expression2>}
MRC - move from coprocessor to ARM60 register (L=1)
MCR - move from ARM60 register to coprocessor (L=0)
{cond} - two character condition mnemonic, see Figure 6: Condition Codes
p# - the unique number of the required coprocessor
Rd is an expression evaluating to a valid ARM60 register number
cn and cm are expressions evaluating to the valid coprocessor register numbers CRn and CRm respectively
<expression2> - where present is evaluated to a constant and placed in the CP field
4.13.6 Examples
58
<expression1> - evaluated to a constant and placed in the CP Opc field
is the number of cycles spent in the coprocessor busy-wait loop.
MRC
MCR
2,5,R3,c5,c6
6,0,R4,c6
; request coproc 2 to perform operation 5
;
;
; request coproc 6 to perform operation 0
;
on c5 and c6, and transfer the (single
32 bit word) result back to R3
on R4 and place the result in c6