FM23MLD16 Ramtron Corporation, FM23MLD16 Datasheet - Page 9

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FM23MLD16

Manufacturer Part Number
FM23MLD16
Description
8mbit F-ram Memory
Manufacturer
Ramtron Corporation
Datasheet

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Power Cycle Timing (T
Notes
1
2
Data Retention (V
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Read Cycle Timing 1 (/CE1 low, CE2 high, /OE low)
Read Cycle Timing 2 (/CE-controlled)
Rev. 1.0
Dec. 2008
Symbol
t
t
t
t
Parameter
Data Retention
PU
PD
VR
VF
Slope measured at any point on V
Ramtron cannot test or characterize all V
when V
100ms through the range of 0.4V to 1.0V.
DD
is below the level of a transistor threshold voltage. Ramtron strongly recommends that V
Parameter
Power-Up to First Access Time (after V
Last Write (/WE high) to Power Down Time (prior to V
V
V
DD
DD
Rise Time
Fall Time
DD
= 2.7V to 3.6V)
A
= -40 C to + 85 C, V
0 to 3V
3 ns
DD
waveform.
DD
power ramp profiles. The behavior of the internal circuits is difficult to predict
DD
= 2.7V to 3.6V unless otherwise specified)
DD
Input and Output Timing Levels
Output Load Capacitance
min)
Min
10
FM23MLD16 - 512Kx16 FRAM (multi die)
TP
)
Min
450
100
50
Units
Years
0
Max
1.5V
30pF
-
-
-
-
Notes
DD
power up faster than
Units
s/V
s/V
s
s
Page 9 of 13
Notes
1,2
1,2

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