AN1836-AN21161 Analog Devices, AN1836-AN21161 Datasheet - Page 19

• Manufacturer Part Number: AN1836-AN21161
• Description: Interfacing the ADSP-21161 SIMD SHARC DSP to the AD1836 (24-bit/96 kHz) Multichannel Codec
• Manufacturer: Analog Devices

3.2 SPORT DMA Channels And Interrupt Vectors
There are 8 dedicated DMA channels for SPORT0, SPORT1, SPORT2, and SPORT3 on the ADSP-21161. The IOP addresses
for the DMA parameter registers are shown in the table below for each corresponding channel and SPORT data buffer. In
multichannel mode, only channels 0, 2, 4 and 6 are activated, because the channel B pins are disabled in Multichannel Mode.
Each serial port buffer and data pin has an assigned TX/RX DMA interrupt (shown in Table 4 below). With serial port DMA
disabled, interrupts occur on a word by word basis, when one word is transmitted or received. Table 4 also shows the interrupt
priority, because of their relative location to one another in the interrupt vector table. The lower the interrupt vector address, the
higher priority the interrupt. Note that channels A and B for each SPORT share the same interrupt location. Thus, data for
both DMA channels (or SPORT data buffers A & B) is processed at the same time, or on a conditional basis depending on the
state of the buffer status bits in the SPORT control registers.
Chan Data Buffer Address
0
1
2
3
4
5
6
7
SP0I
SP1I
SP2I
SP3I
Interrupt
1
Interrupt names are defined in the def21161.h include file supplied
with the ADSP-21000 Family Visual DSP Development Software.
RX0A/TX0A 0x0060 0x0064
RX0B/TX0B 0x0080 0x0084
RX1A/TX1A 0x0068 0x006C
RX1B/TX1B 0x0088 0x008C
RX2A/TX2A 0x0070 0x0074
RX2B/TX2B 0x0090 0x0094
RX3A/TX3A 0x0078 0x005C
RX3B/TX3B 0x0098 0x009C
Table 3. 8 SPORT DMA channels and data buffers
Table 4. ADSP-21161 Serial Port Interrupts
1
DMA channels 8 to 13 are used for Link
Ports, SPI and External Port DMA
Function
SPORT0 TX or RX DMA channels 0 and 1
SPORT1 TX or RX DMA channels 2 and 3
SPORT2 TX or RX DMA channels 4 and 5
SPORT3 TX or RX DMA channels 6 and 7
Description
Serial port 0 rx or tx; A data
Serial port 0 rx or tx; B data
Serial port 1 rx or tx; A data
Serial port 1 rx or tx; B data
Serial port 2 rx or tx; A data
Serial port 2 rx or tx; B data
Serial port 3 rx or tx; B data
Serial port 3 rx or tx; B data
Priority
Highest
Lowest