AN2662 Freescale Semiconductor / Motorola, AN2662 Datasheet - Page 14

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AN2662

Manufacturer Part Number
AN2662
Description
Migrating from PowerQUICC II to PowerQUICC III
Manufacturer
Freescale Semiconductor / Motorola
Datasheet

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Communications Processor Module (CPM)
Communications Processor Module (CPM)
3.4 Independent/Serial Direct Memory Access
In the PowerQUICC II, the CPM contains two physical serial DMA (SDMA) channels. The CPM uses these
two physical channels to implement two dedicated SDMA channels for each of the FCC, MCC, SCC, SMC,
SPI and I2C. In addition, four virtual SDMA channels can be assigned to the programmable and
independent DMA (IDMA) channels. On the PowerQUICC III, PPC Little-Endian SDMA mode is not
supported since this is typically not used in a big-endian system.
IDMA emulation is also not supported on the CPM block. The main reason for this is throughput. In order
to implement SDMA or IDMA channels on the PowerQUICC II, valuable CPM bandwidth has to be used.
On the PowerQUICC III the introduction of a dedicated 4-channel hardware DMA engine means that
channels are more efficient and can be quickly set up and removed without wasting CPM bandwidth. The
IDMA features of the PowerQUICC II, as well as a number of new features, exist in the new hardware DMA
block on the PowerQUICC III. See Section 4.1, “e500 Coherency Module (ECM),” for more information
about the 4-channel hardware DMA engine.
3.5 CPM Summary
Up to this point the focus has been directed to the various differences between the Communications
Processor Module on both the PowerQUICC II and PowerQUICC III. Increased functionality and
performance has been achieved while retaining the existing programming model in order to maximize
customers existing software legacy. The following Table summarizes the main CPM differences between
the PowerQUICC II and PowerQUICIII.
14
Migrating from PowerQUICC II to PowerQUICC III
MOTOROLA
For More Information On This Product,
Go to: www.freescale.com

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