AN2662 Freescale Semiconductor / Motorola, AN2662 Datasheet - Page 2

• Manufacturer Part Number: AN2662
• Description: Migrating from PowerQUICC II to PowerQUICC III
• Manufacturer: Freescale Semiconductor / Motorola

System Overview
System Overview
1 System Overview
The PowerQUICC III is the latest addition to Motorola’s PowerQUICC line of integrated communications
processors, offering the end-user greater flexibility, extended capabilities and high levels of integration.
Figure 1 illustrates the internal blocks of the MPC8560.
Like the other members of the PowerQUICC family, the MPC8560 is split into three main system blocks:
The MPC8540, another member of the PowerQUICC III family, is identical to the system block diagram of
the MPC8560 except that the CPM block has been replaced by a dual UART and an additional 10/100
Ethernet MAC. As a feature subset of the MPC8560, the MPC8540 uses the same package as the MPC8560
(783PBGA) and is footprint compatible. The redundant CPM pins on the MPC8540 package are replaced
by no connects.
The MPC8555 and MPC8541 devices expand the PowerQUICC III roadmap with the inclusion of a 32-bit
PCI controller, a lite version of the MPC8560 CPM, and an integrated security core. Higher performance
HiP8 derivatives are planned for release by Freescale in 2005. However, this document refers only to the
performance and features of HiP7 PowerQUICC III designs.
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Microprocessor core: e500 Book E core with 32 Kbytes of L1 instruction/data cache and
256 Kbytes of configurable L2 cache or SRAM.
Communications Processing Module (CPM): (similar to the CPM block on the PowerQUICC II,
HiP 7).
Peripheral Modules: used to provide a number primary and auxiliary functions such as DDR
SDRAM, RapidIO, PCI, PCI-X, three-speed Ethernet controllers. These are covered in detail in
Section 4.6, “Three-Speed Ethernet Controller.”
DDR SDRAM Controller
Local Bus Controller
Interrupt Controller
I
2
CPM
C Controller
MCC
MCC
FCC
FCC
FCC
SCC
SCC
SCC
SCC
SPI
I
Migrating from PowerQUICC II to PowerQUICC III
2
C
Freescale Semiconductor, Inc.
Figure 1. System Block Diagram of MPC8560
For More Information On This Product,
Parallel I/O
Generators
Baud Rate
I-Memory
DPRAM
Engine
Timers
Serial
ROM
RISC
DMA
Go to: www.freescale.com
Coherency
Module
256 Kbytes
L2-Cache/
SRAM
PCI/PCI-X Controller
RapidIO Controller
10/100/1000 MAC
10/100/1000 MAC
DMA Controller
L1 I cache
32 Kbytes
Core Complex Bus
e500 Core
L1 D cache
32 Kbytes
MOTOROLA