IDT72V3680L10PF IDT, Integrated Device Technology Inc, IDT72V3680L10PF Datasheet - Page 41

• Manufacturer Part Number: IDT72V3680L10PF
• Description: IC FIFO SS 16384X36 10NS 128TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Vr

Specifications of IDT72V3680L10PF

• Function: Asynchronous, Synchronous
• Memory Size: 576K (16K x 36)
• Data Rate: 100MHz
• Access Time: 10ns
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP, 128-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V3680L10PF

DEPTH EXPANSION CONFIGURATION (FWFT MODE ONLY)
greater than 1,024, 2,048 for the IDT72V3650, 4,096 for the IDT72V3660,
8,192 for the IDT72V3670, 16,384 for the IDT72V3680 and 32,768 for the
IDT72V3690 with an 36-bit bus width. In FWFT mode, the FIFOs can be
connected in series (the data outputs of one FIFO connected to the data inputs
of the next) with no external logic necessary. The resulting configuration
provides a total depth equivalent to the sum of the depths associated with each
single FIFO. Figure 30 shows a depth expansion using two IDT72V3640/
72V3650/72V3660/72V3670/72V3680/72V3690 devices.
in the depth expansion configuration. The first word written to an empty
configuration will pass from one FIFO to the next ("ripple down") until it finally
appears at the outputs of the last FIFO in the chain – no read operation is
necessary but the RCLK of each FIFO must be free-running. Each time the data
word appears at the outputs of one FIFO, that device's OR line goes LOW,
enabling a write to the next FIFO in line.
the last FIFO in the chain to go LOW (i.e. valid data to appear on the last FIFO's
outputs) after a word has been written to the first FIFO is the sum of the delays
for each individual FIFO:
where N is the number of FIFOs in the expansion and T
Note that extra cycles should be added for the possibility that the t
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
FWFT/SI
WRITE ENABLE
INPUT READY
DATA IN
WRITE CLOCK
The IDT72V3640 can easily be adapted to applications requiring depths
Care should be taken to select FWFT mode during Master Reset for all FIFOs
For an empty expansion configuration, the amount of time it takes for OR of
Figure 30. Block Diagram of 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36, 32,768 x 36 and 65,536 x 36 Depth Expansion
n
(N – 1)*(4*transfer clock) + 3*T
IR
Dn
WCLK
WEN
72V3640
72V3650
72V3660
72V3670
72V3680
72V3690
FWFT/SI
IDT
TRANSFER CLOCK
RCLK
RCLK
REN
RCLK
OE
OR
Qn
is the RCLK period.
SKEW1
GND
TM
n
41
36-BIT FIFO
specification is not met between WCLK and transfer clock, or RCLK and transfer
clock, for the OR flag.
depth expansion configuration. There will be no delay evident for subsequent
words written to the configuration.
configuration will "bubble up" from the last FIFO to the previous one until it finally
moves into the first FIFO of the chain. Each time a free location is created in one
FIFO of the chain, that FIFO's IR line goes LOW, enabling the preceding FIFO
to write a word to fill it.
FIFO in the chain to go LOW after a word has been read from the last FIFO is
the sum of the delays for each individual FIFO:
where N is the number of FIFOs in the expansion and T
period. Note that extra cycles should be added for the possibility that the t
specification is not met between RCLK and transfer clock, or WCLK and transfer
clock, for the IR flag.
is faster. Both these actions result in data moving, as quickly as possible, to the
end of the chain and free locations to the beginning of the chain.
The "ripple down" delay is only noticeable for the first word written to an empty
The first free location created by reading from a full depth expansion
For a full expansion configuration, the amount of time it takes for IR of the first
The Transfer Clock line should be tied to either WCLK or RCLK, whichever
WCLK
IR
Dn
WEN
(N – 1)*(3*transfer clock) + 2 T
72V3640
72V3650
72V3660
72V3670
72V3680
72V3690
FWFT/SI
IDT
COMMERCIAL AND INDUSTRIAL
RCLK
REN
OR
TEMPERATURE RANGES
OE
Qn
OCTOBER 22, 2008
OUTPUT ENABLE
n
WCLK
OUTPUT READY
READ ENABLE
READ CLOCK
WCLK
DATA OUT
4667 drw 35
is the WCLK
SKEW1