LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 12

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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List of Registers
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
General-Purpose Timers .............................................................................................................. 143
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Watchdog Timer............................................................................................................................ 175
Register 1:
Register 2:
Register 3:
12
GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 118
GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 119
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 120
GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 121
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 122
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 123
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 124
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 125
GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 126
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 127
GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 128
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 129
GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 130
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 131
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 132
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 133
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 134
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 135
GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 136
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 137
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 138
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 139
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 140
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 141
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 142
GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 155
GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 156
GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 157
GPTM Control (GPTMCTL), offset 0x00C............................................................................... 158
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 160
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 162
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 163
GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 164
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 165
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 166
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 167
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 168
GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 169
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 170
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 171
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 172
GPTM TimerA (GPTMTAR), offset 0x048 ............................................................................... 173
GPTM TimerB (GPTMTBR), offset 0x04C .............................................................................. 174
Watchdog Load (WDTLOAD), offset 0x000 ............................................................................ 178
Watchdog Value (WDTVALUE), offset 0x004 ......................................................................... 179
Watchdog Control (WDTCTL), offset 0x008............................................................................ 180
Preliminary
July 5, 2006

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