LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 332

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Pulse Width Modulator (PWM)
332
Reset
Reset
Type
Type
Bit Field
PWMn Compare A (PWMnCMPA)
31:16
R/W
RO
31
15
0
0
15:0
Register 16: PWM0 Compare A (PWM0CMPA), offset 0x058
This register contains a value to be compared against the counter. When this value matches the
counter, a pulse is output; this can drive the generation of a PWM signal (via the PWMnGENA/
PWMnGENB registers) or drive an interrupt or ADC trigger (via the PWMnINTEN register). If the
value of this register is greater than the PWMnLOAD register (see page 330), then no pulse is
ever output.
For comparator A, if the update mode is immediate (based on the CmpAUpd bit in the PWMnCTL
register), then this 16-bit CompA value is used the next time the counter reaches zero. If the update
mode is synchronous, it is used the next time the counter reaches zero after a synchronous
update has been requested through the PWM Master Control (PWMCTL) register (see
page 316). If this register is rewritten before the actual update occurs, the previous value is never
used and is lost.
R/W
RO
30
14
0
0
reserved
CompA
Name
R/W
RO
29
13
0
0
R/W
RO
28
12
0
0
Type
R/W
R/W
RO
RO
27
11
0
0
R/W
RO
26
10
0
0
Reset
R/W
RO
25
0
9
0
0
0
Preliminary
R/W
RO
24
0
8
0
reserved
CompA
Description
Reserved bits return an indeterminate value, and should
never be changed.
The value to be compared against the counter.
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
R/W
RO
17
July 5, 2006
0
1
0
R/W
RO
16
0
0
0