LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 164

• Manufacturer Part Number: LM3S301
• Description: Lm3s301 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

General-Purpose Timers
164
Reset
Reset
Type
Type
GPTM Interrupt Clear (GPTMICR)
Offset 0x024
31:11
RO
RO
31
15
0
0
7:4
Bit
10
9
8
3
2
1
0
Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024
This register is used to clear the status bits in the GPTMRIS and GPTMMIS registers. Writing a 1
to a bit clears the corresponding bit in the GPTMRIS and GPTMMIS registers.
RO
RO
30
14
0
0
TBTOCINT
TATOCINT
CBMCINT
CAMCINT
CBECINT
RTCCINT
CAECINT
reserved
reserved
Name
reserved
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
W1C
W1C
W1C
W1C
W1C
W1C
W1C
RO
RO
W1C
RO
27
11
0
0
CBECINT
W1C
RO
0
26
10
0
Reset
0
0
0
0
0
0
0
0
0
CBMCINT TBTOCINT
W1C
RO
25
0
0
9
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM CaptureB Event Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureB Match Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM TimerB Time-Out Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
Reserved bits return an indeterminate value, and should never
be changed.
GPTM RTC Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureA Event Interrupt Clear
0: The interrupt is unaffected.
1: The interrupt is cleared.
GPTM CaptureA Match Raw Interrupt
This is the CaptureA match interrupt status after masking.
GPTM TimerA Time-Out Raw Interrupt
0: The interrupt is unaffected.
1: The interrupt is cleared.
W1C
RO
24
0
0
8
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RTCCINT
W1C
RO
19
0
3
0
CAECINT CAMCINTTATOCINT
W1C
RO
18
0
0
2
W1C
RO
17
July 5, 2006
0
0
1
W1C
RO
16
0
0
0