LM3S301 Luminary Micro, Inc, LM3S301 Datasheet - Page 160

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LM3S301

Manufacturer Part Number
LM3S301
Description
Lm3s301 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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General-Purpose Timers
160
Reset
Reset
Type
Type
GPTM Interrupt Mask (GPTMIMR)
Offset 0x018
31:11
RO
RO
31
15
0
0
7:4
Bit
10
9
8
3
2
Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018
This register allows software to enable/disable GPTM controller-level interrupts. Writing a 1
enables the interrupt, while writing a 0 disables it.
RO
RO
30
14
0
0
reserved
reserved
TBTOIM
CBMIM
CBEIM
RTCIM
CAEIM
Name
reserved
RO
RO
29
13
0
0
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
27
11
0
0
CBEIM
R/W
RO
26
10
0
0
Reset
0
0
0
0
0
0
0
CBMIM TBTOIM
R/W
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM CaptureB Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM CaptureB Match Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM TimerB Time-Out Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
Reserved bits return an indeterminate value, and should never
be changed.
GPTM RTC Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
GPTM CaptureA Event Interrupt Mask
0: Interrupt is disabled.
1: Interrupt is enabled.
R/W
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RTCIM
R/W
RO
19
0
3
0
CAEIM CAMIM TATOIM
R/W
RO
18
0
2
0
R/W
RO
17
July 5, 2006
0
1
0
R/W
RO
16
0
0
0

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