SPFD54124B Drise, SPFD54124B Datasheet - Page 114

• Manufacturer Part Number: SPFD54124B
• Description: 396-Channel 6-Bit Source Driver
• Manufacturer: Drise

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7.2.3.2 Read cycle sequence
The read cycle means that the host reads information (command or/and data) to the display via the interface. Each read cycle (E
low-high-low sequence) consists of 3 control (D/CX, E, R/WX) and data signals (D[17:0]). D/CX bit is a control signal, which tells if the data
is a command or a data. The data signals are the command if the control signal is low (=’0’) and vice versa it is data (=’1’).
Note: E is an unsynchronized signal (It can be stopped)
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Proprietary & Confidential
LCD to Host]
Host [17:0]
Host to LCD
Driver [17:0]
D[17:0]
D[17:0]
RESX
R/WX
D/CX
CSX
E
D[17:0]
R/WX
CMD: Write command code
PA: Parameter or RAM data
‘1’
E
1-byte command
S
S
S
The display starts to
control D[17:0] lines
when there is a rising
edge of the E
Fig. 7.2.3.1.2 6800-Series parallel bus protocol, Write to register or display RAM
‘0’
‘1’
CMD
CMD
CMD
Hi-Z
Fig. 7.2.3.2.1 6800-Series Read Protocol
CMD
CMD
CMD
2-byte command
PA
PA
PA
The host reads
D[17:0] lines when
there is a falling edge
of the E
1
1
1
CMD
CMD
CMD
N-byte command (PA=N-1)
114
PA
PA
PA
1
1
The display stops to
control D[17:0] lines
1
Signal on D[17:0], DCX. R/WX, E pins
during CSX=’1’ are ignored
PA
PA
PA
N-2
N-2
N-2
SPFD54124B
Preliminary
PA
PA
PA
Preliminary Version: 0.6
N-1
N-1
N-1
APR. 26, 2007
P
P
P