SPFD54124B Drise, SPFD54124B Datasheet - Page 48

• Manufacturer Part Number: SPFD54124B
• Description: 396-Channel 6-Bit Source Driver
• Manufacturer: Drise

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6.2.22. RAMWR (2Ch): Memory Write
NOTE: “-” Don’t care, can be set to VDDIO or DGND level
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Description
Restriction
Availability
Register
N
1
Default
st
th
Inst / Para
RAMWR
Parameter
Parameter
2CH
∣
-This command is used to transfer data from MCU to frame memory.
-This command makes no change to the other driver status.
-When this command is accepted, the column register and the row register are reset to the Start Column/Start Row
-The Start Column/Start Row positions are different in accordance with MADCTR setting.
-Sending any other command can stop Frame Write.
In all color modes, there is no restriction on length of parameters.
-1. 128X160 memory base (GM = ‘00’)
-2. 120x160 memory base (GM = ‘01’)
-3. 128x128 memory base (GM = ‘10’)
-4. 132x162 memory base (GM = ‘11’)
positions.
128x160x18-bit memory can be written by this command
Memory range: (0000h,0000h) -> (007Fh, 09Fh)
120x160x18-bit memory can be written on this command.
Memory range: (0000h,0000h) -> (0077h,09Fh)
128x128x18-bit memory can be written on this command.
Memory range: (0000h,0000h) -> (007Fh,007Fh)
132x162x18-bit memory can be written on this command.
Memory range: (0000h,0000h) -> (0083h,00A1h)
Normal Mode On, Idle Mode On, Sleep Out
Normal Mode On, Idle Mode Off, Sleep Out
Partial Mode On, Idle Mode Off, Sleep Out
Partial Mode On, Idle Mode On, Sleep Out
D/CX
0
1
1
1
WRX
Power On Sequence
↑
↑
↑
↑
H/W Reset
S/W Reset
Sleep In
RDX
Status
Status
1
1
1
1
D17-8
D17-8
D17-8
∣
-
D7
D7
D7
∣
0
RAMWR (Memory Write)
D6
D6
D6
∣
0
48
D5
D5
D5
∣
1
Contents of memory is set randomly
Contents of memory is not cleared
Contents of memory is not cleared
D4
D4
D4
∣
0
Default Value
Availability
Yes
Yes
Yes
Yes
Yes
D3
D3
D3
∣
1
D2
D2
D2
∣
1
SPFD54124B
Preliminary
D1
D1
D1
∣
0
Preliminary Version: 0.6
D0
D0
D0
∣
0
APR. 26, 2007
(Code)
(2Ch)
∣
-
-