SPFD54124B Drise, SPFD54124B Datasheet - Page 52

• Manufacturer Part Number: SPFD54124B
• Description: 396-Channel 6-Bit Source Driver
• Manufacturer: Drise

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6.2.25. PTLAR (30h): Partial Area
NOTE: “-” Don’t care, can be set to VDDIO or DGND level
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Description
Restriction
Availability
2
1
3
4
Register
nd
st
rd
th
Inst / Para
Parameter
Parameter
Parameter
PTLAR
Parameter
30H
-This command defines the partial mode’s display area.
-There are 4 parameters associated with this command, the first defines the Start Row (PSL) and the second the End
-If End Row = Start Row then the Partial Area will be one row deep.
-
Row (PEL), as illustrated in the figures below. PSL and PEL refer to the Frame Memory row address counter.
D/CX
Normal Mode On, Idle Mode Off, Sleep Out
Normal Mode On, Idle Mode On, Sleep Out
Partial Mode On, Idle Mode On, Sleep Out
Partial Mode On, Idle Mode Off, Sleep Out
0
1
1
1
1
-If End Row > Start Row, when MADCTL ML=’0’
-If End Row > Start Row, when MADCTL ML=’1’
-If End Row < Start Row, when MADCTL ML=’0’
WRX
↑
↑
↑
↑
↑
RDX
Sleep In
Status
1
1
1
1
1
Start Row
End Row
End Row
Start Row
End Row
Start Row
PSL [15:0]
PEL [15:0]
PEL [15:0]
PSL [15:0]
PEL [15:0]
PSL [15:0]
D17-8
-
-
-
-
-
PSL15 PSL14 PSL13 PSL12
PEL15 PEL14 PEL13 PEL12
PSL7
PEL7
D7
0
Non-displaying Area
Non-displaying Area
Non-displaying Area
Non-displaying Area
Non-displaying Area
PSL6
PEL6
D6
0
PTLAR (Partial Area)
52
PSL5
PEL5
D5
1
PSL4
PEL4
D4
1
Partial Display Area
Partial Display Area
Partial Display Area
Partial Display Area
Availability
PSL11
PEL11
PSL3
PEL3
D3
Yes
Yes
Yes
Yes
Yes
0
PSL10
PEL10
PSL2
PEL2
D2
0
SPFD54124B
PSL9
PSL1
PEL9
PEL1
Preliminary
D1
0
Preliminary Version: 0.6
PSL8
PSL0
PEL8
PEL0
D0
0
APR. 26, 2007
(Code)
(30h)