SPFD54124B Drise, SPFD54124B Datasheet - Page 178

no-image

SPFD54124B

Manufacturer Part Number
SPFD54124B
Description
396-Channel 6-Bit Source Driver
Manufacturer
Drise
Datasheet
www.DataSheet4U.com
7.6. Address Counter
The address counter sets the addresses of the display data RAM for writing and reading.
Data is written pixel-wise into the RAM matrix of DRIVER. The data for one pixel or two pixels is collected (RGB 8-8-8-bit), according to the
data formats. As soon as this pixel-data information is complete the “Write access” is activated on the RAM. The locations of RAM are
addressed by the address pointers. The address ranges are X=0 to X=128 (7Fh) and Y=0 to Y=160 (9Fh). Addresses outside these ranges
are not allowed. Before writing to the RAM a window must be defined into which will be written. The window is programmable via the
command registers XS, YS designating the start address and XE, YE designating the end address.
For example the whole display contents will be written, the window is defined by the following values: XS=0 (0h) YS=0 (0h) and XE=128
(7Fh), YE=160 (9Fh).
In vertical addressing mode (MV=1), the Y-address increments after each byte, after the last Y-address (Y=YE), Y wraps around to YS and
X increments to address the next column. In horizontal addressing mode (V=0), the X-address increments after each byte, after the last
X-address (X=XE), X wraps around to XS and Y increments to address the next row. After the every last address (X=XE and Y=YE) the
address pointers wrap around to address (X=XS and Y=YS).
For flexibility in handling a wide variety of display architectures, the commands “CASET, RASET” and “MADCTR” , define flags MX and MY,
which allows mirroring of the X-address and Y-address. All combinations of flags are allowed. Fig. 8.2.3 show the available combinations of
writing to the display RAM. When MX, MY and MV will be changed the data bust be rewritten to the display RAM.
For each image condition, the controls for the column and row counters apply as Fig. 7.6.1 below:
When RAMWR/RAMRD command is accepted
Complete Pixel Read / Write action
The Column counter value is larger than “End Column (XE)”
The Column counter value is larger than “End Column (XE)” and the Row
counter value is larger than “End Row (YE)”
© ORISE Technology Co., Ltd.
Proprietary & Confidential
Condition
178
Column Counter
Return to “Start
Return to “Start
Return to “Start
Increment by 1
Column (XS)”
Column (XS)”
Column (XS)”
SPFD54124B
Return to “Start Row
Return to “Start Row
Preliminary
Increment by 1
Preliminary Version: 0.6
Row Counter
No change
(YS)”
(YS)”
APR. 26, 2007

Related parts for SPFD54124B