SPFD54124B Drise, SPFD54124B Datasheet - Page 71

• Manufacturer Part Number: SPFD54124B
• Description: 396-Channel 6-Bit Source Driver
• Manufacturer: Drise

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6.3.1.
NOTE: “-” Don’t care, can be set to VDDIO or DGND level
6.3. Panel Command Description
© ORISE Technology Co., Ltd.
Proprietary & Confidential
Description
Restriction
Availability
1
Register
st
Default
Inst / Para
RGBCTR
Parameter
B0H
RGBCTR (B0h): RGB signal control
-Set the operation status on the RGB interface. The setting becomes effective as soon as the command is received.
-ICM: GRAM Write/Read frequency and data input select on the RGB interface
-If this register not using the register need be reserved.
D/CX
Normal Mode On, Idle Mode Off, Sleep Out
Normal Mode On, Idle Mode On, Sleep Out
Symbol
Partial Mode On, Idle Mode Off, Sleep Out
Partial Mode On, Idle Mode On, Sleep Out
0
1
HSP
VSP
DP
EP
Power On Sequence
ICM
0
1
WRX
S/W Reset
H/W Reset
↑
↑
Status
Enable polarity set
Hsync polarity set
PCLK polarity set
Vsync polarity set
RDX
Sleep In
Status
1
1
Name
D17-8
Write cycle
-
-
PCLK
SCL
Write/ Read frequency and input data select
D7
1
0
‘1’ = data fetched at the falling edge
‘0’ = data fetched at the rising edge
‘1’ = Low enable for RGB interface
‘0’ = High enable for RGB interface
‘1’ = High level sync clock
‘0’ = Low level sync clock
‘1’ = High level sync clock
‘0’ = Low level sync clock
RGBCTR (RGB signal control)
D6
0
0
Clock polarity set for RGB Interface
Internal oscillator
71
Read cycle
ICM
0d
0d
0d
PCLK
D5
1
0
Default Value
ICM
D4
1
Availability
DP
D3
Yes
Yes
Yes
Yes
Yes
0
Data input
D[17:0]
SDA
DP/EP/HSP/VSP
0d/0d/0d/0d
0d/0d/0d/0d
0d/0d/0d/0d
D2
EP
0
SPFD54124B
HSP
D1
Preliminary
0
Preliminary Version: 0.6
VSP
D0
0
APR. 26, 2007
(Code)
(B0h)