spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 111

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

16.4.5.1
Datasheet
1. The Setup time is determined by the value programmed into the Setup Timing register, index 3Ah/3Dh. Using the Timer Set
2. The Command time is determined by the value programmed into the Command Timing register, index 3Bh/3Eh. Using the
3. The Recovery time is determined by the value programmed into the Recovery Timing register, index 3Ch/3Fh. Using the
4. For typical active timing programmed at 280 ns, maximum -WAIT timing is 190 ns after Command active.
-REG, -CE[2:1],
Symbol
0 default value of 01h, the setup time would be 70 ns. S = (N
page
Timer Set 0 default value of 06h, the Command time would be 270 ns. C = (N
Timer Set 0 default value of 03h, the hold (Recovery) time would be 150 ns. R = (N
Table 31. Memory Read/Write Timing (Word Access)
Figure 23. Memory Read/Write Timing
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
Write Cycle
Read Cycle
-OE, -WE
109.
A[25:0]
D[15:0]
D[15:0]
-WAIT
-CE[2:1], -REG, Address, and Write Data setup to Command
active
Command pulse width
Address hold and Write Data valid from Command inactive
-WAIT active from Command active
Command hold from -WAIT inactive
Data valid from -WAIT inactive
Data setup before -OE inactive
Data hold after -OE inactive
PC Card Socket Timing
1
2
Parameter
t
1
4
t
4
ISA-to-PC-Card (PCMCIA) Controllers — PD6710/’22
pres
t
2
N
val
3
+ 1), see
t
6
t
(S
(C
(R
pres
5
(2 Tcp) + 10
(2 Tcp) + 10
t
7
“PC Card Bus Timing Calculations” on
Tcp) – 10
Tcp) – 10
Tcp) – 10
MIN
pres
N
0
val
t
+ 1), see page 109.
8
N
val
+ 1), see page 109.
(C – 2)Tcp – 10
Tcp + 10
MAX
t
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
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