spd6722qcce Intel Corporation, spd6722qcce Datasheet - Page 54

• Manufacturer Part Number: spd6722qcce
• Description: Isa-to-pc-card Pcmcia Controllers
• Manufacturer: Intel Corporation

PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
7.6
54
Register Name; Management Interrupt Configuration
Index: 05h
Bit 7
Management Interrupt Configuration
This register controls which status changes may cause management interrupts and at which pin the
management interrupts will appear.
Bit 0 — Battery Dead Or Status Change Enable
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Battery Dead Or Status Change bit (see
‘1’. This allows management interrupts to be generated on changes in level of the BVD1/
-STSCHG pin.
Bit 1 — Battery Warning Enable
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Battery Warning Change bit (see
ignored when the card socket is in I/O mode.
Bit 2 — Ready Enable
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Ready Change bit (see
Management IRQ Select
Bit 6
0
1
0
1
0
1
RW:0000
Battery Dead Or Status Change management interrupt disabled.
If Battery Dead Or Status Change is ‘1’, a management interrupt will occur.
Battery Warning Change management interrupt disabled.
If Battery Warning Change is ‘1’, a management interrupt will occur.
Ready Change management interrupt disabled.
If Ready Change is ‘1’, a management interrupt will occur.
Bit 5
“Bit 1 — Battery Warning Change” on page
Bit 4
“Bit 1 — Battery Warning Change” on page
“Bit 0 — Battery Dead Or Status Change” on page
Card Detect
Enable
RW:0
Bit 3
Enable
Ready
RW:0
Bit 2
53) is ‘1’.
Register Compatibility Type: 365
Warning
Battery
Enable
RW:0
Bit 1
53) is ‘1’. This bit is
Register Per: socket
Battery Dead
Datasheet
Or Status
Change
Enable
RW:0
Bit 0
53) is